參數(shù)資料
型號： EL13C7G2F-133.330MTR
廠商： ECLIPTEK CORP
元件分類： XO, clock
英文描述： CRYSTAL OSCILLATOR, CLOCK, 133.33 MHz, LVDS OUTPUT
封裝： ROHS COMPLIANT, CERAMIC, SMD, 6 PIN
文件頁數(shù)： 1/2頁
文件大?。?/td> 127K
代理商： EL13C7G2F-133.330MTR
MANUFACTURER
CATEGORY
SERIES
PACKAGE
VOLTAGE
CLASS
REV
.DATE
ECLIPTEK CORP.
OSCILLATOR
EL13C7
CERAMIC
3.3V
OS5G
01/10
EL13C7 Series
OSCILLATOR
EL13C7
ELECTRICAL SPECIFICATIONS
800-ECLIPTEK www.ecliptek.com for latest revision
Specifications subject to change without notice.
Crystal Clock Oscillators
LVDS Output
+3.3V Supply Voltage
Complementary Output
Tri-State Output Function
6 Pad Ceramic SMD Package
Low Stand-by Current
RoHS Compliant (Pb-Free)
H
2.0
L
7.0
W
5.0
80, 80.157, 85, 87.125, 90, 100, 106.25, 110, 119, 120, 122.888, 124.4, 125, 127, 128, 131.072, 133, 133.33, 133.333,
135, 137.472, 150, 155.52, 156.25, 159.375, 161.1328 , 162.5, 163.84, 164.355, 164.355469, 166, 166.67, 167.3316,
170, 173.3705, 175, 176.83816, 187.5, 187.509375, 187.5103, 200, 212.5, 240, 250, or 312.5MHz
0°C to +70°C, or -40°C to +85°C
-55°C to +125°C
3.3V
DC ±5%
50mA Maximum
65mA Maximum
±100ppm, ±50ppm, ±25ppm, or
±20ppm Maximum
1.43V
DC Typical, 1.6VDC Maximum
1.1V
DC Typical, 0.9VDC Minimum
247mV Minimum, 330mV Typical, 454mV Maximum
1.125V Minimum, 1.250V Typical, 1.375V Maximum
300pSec Typical, 700pSec Maximum
50mV Maximum
50 ±5(%)
150mV Maximum
350mVdc Minimum
100 Ohms
Tri-State and Complementary Output
Enables Outputs
Disables Outputs: High Impedance
30A Maximum
10 mSeconds Maximum
0.4pSec Typical, 1 pSec Maximum
-60dBc/Hz at 10Hz Offset
-95dBc/Hz at 100Hz Offset
-125dBc/Hz at 1kHz Offset
-143dBc/Hz at 10kHz Offset
-145dBc/Hz at 100kHz Offset
-145dBc/Hz at 1MHz Offset
-146dBc/Hz at 10MHz Offset
Nominal Frequency (MHz)
Operating Temperature Range
Storage Temperature Range
Supply Voltage (V
CC)
Input Current
Frequency Tolerance / Stability
Output Voltage Logic High (V
OH)
Output Voltage Logic Low (V
OL)
Differential Output Voltage (V
OD)
Offset Voltage (V
OS)
Rise Time / Fall Time
Differential Output Error (
DVDD)
Duty Cycle
Offset Error (
DVOS)
Output Swing (
DVOPP)
Load Drive Capability
Logic Control / Additional Output
Tri-State Input Voltage
Standby Current
Start Up Time
RMS Phase Jitter
Typical Phase Noise
80MHz to 249.999999MHz
250MHz to 312.5MHz
Inclusive of All Conditions: Calibration Tolerance at 25°C,
Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, 1st Year
Aging at 25°C, Shock, and Vibration
20% to 80% of waveform
at 50% of waveform or at the crossing point
Between Output and Complementary Output
V
IH of 70% of VCC Minimum
No Connection
V
IL of 30% of VCC Maximum
Without Load
FJ = 12kHz to 20MHz
Fo=156.250MHz
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