參數(shù)資料
型號: EDI8L32256C25AC
廠商: Electronic Theatre Controls, Inc.
英文描述: 256Kx32, 5V Static Ram
中文描述: 256Kx32,5V的靜態(tài)RAM
文件頁數(shù): 1/5頁
文件大小: 74K
代理商: EDI8L32256C25AC
EDI8L32256C
256Kx32 SRAMModule
1
EDI8L32256C Rev. 4 3/98 ECO#9662
Features
256Kx32, 5V Static Ram
The EDI8L32256C is a high speed, 5V, 8 megabit SRAM
The device is available with access times of 15, 17, 20 and
25ns, allowing the creation of a no wait state DSP memory
solution.
The device can be configured as a 256Kx32 and used to
create a single chip external data memory solution for
Texas Instruments' TMS320C30/31, TMS 320C32 or
TMS320C4x, Motorola's DSP96002 and Analog Device's
SHARC
TM
DSP.
Alternatively the device's chip enables can be used to
configure it as a 512Kx16. A 512Kx48 programmemory
array for Analog's SHARC
TM
DSP is created using three
devices. If this memory is too deep, two 256Kx24s
(EDI8L24256C) can be used to create a 256Kx48 array or
two 128Kx24s (EDI8L24128C) can be used to create a
128Kx48 array.
The device provides a 32% space savings when compared
to two monolithic 256Kx16, 44 pin SOJs.
The device provides a memory upgrade of the
EDI8L32128C (128Kx32) and the EDI8L3265C (64Kx32).
For more memory the device can be upgraded to the
EDI8L32512C (512Kx32).
256Kx32 bit CMOS Static
DSP Memory Solution
Texas Instruments TMS320C3x, TMS320C4x
Analog SHARC
TM
DSP
Motorola DSP96002
RandomAccess Memory Array
Fast Access Times: 15, 17, 20 and 25ns
Individual Byte Enables
User Configurable Organization
with Mnimal Additional Logic
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Surface Mount Package
68 Lead PLCC, No. 99, JEDEC MO-47AE
Small Footprint, 0.990 Sq. In.
Multiple Ground Pins for Maximum
Noise Immunity
Single +5V (±5%) Supply Operation
Pin Names
A-A17
E-E1
BS-BS3
W
G
DQ-DQ31
VCC
VSS
NC
Address Inputs
Chip Enables (One per Word)
Byte Selects (One per Byte)
Master Write Enable
Master Output Enable
Common Data Input/Output
Power (+5V±5%)
Ground
No Connection
A-A17
G
W
E
E1
BS
BS1
BS2
BS3
18
256Kx32
Memory
Array
DQ-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
Electronic Designs Incorporated
One Research Drive Westborough, MA 01581USA 508-366-5151 FAX 508-836-4850
http://www.electronic-designs.com
Pin Configurations and Block Diagram
NOTE: Solder Reflow temperature should not exceed 260°C for 10 seconds.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
DQ24
DQ25
DQ26
DQ27
VSS
DQ28
DQ29
DQ30
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
DQ14
DQ13
DQ12
VSS
DQ11
DQ10
DQ9
DQ8
VCC
DQ7
DQ6
DQ5
DQ4
VSS
DQ3
DQ2
DQ1
D
2
A
2
A
2
A
3
A
3
A
3
A
3
A
V
3
A
A
A
A
A
4
A
4
A
4
D
9
D
8
N
7
A
6
B
5
B
4
B
3
B
2
E
1
V
6
6
6
6
6
6
6
6
Note: For memory upgrade information refer to page 8, Figure 8 "EDI MCM-L
upgrade path".
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