參數(shù)資料
型號(hào)： EDD5108ADTA
廠商： Elpida Memory, Inc.
英文描述： 512M bits DDR SDRAM
中文描述： 512M比特DDR內(nèi)存
文件頁(yè)數(shù)： 14/48頁(yè)
文件大?。?/td> 558K
代理商： EDD5108ADTA
EDD5108AFTA-5, EDD5116AFTA-5
Data Sheet E0741E20 (Ver. 2.0)
14
Row address strobe and bank activate [ACT]
This command activates the bank that is selected by BA0, BA1 and determines the row address (AX0 to AX12).
(See Bank Select Signal Table)
Precharge selected bank [PRE]
This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table)
[Bank Select Signal Table]
BA0
BA1
Bank 0
L
L
Bank 1
H
L
Bank 2
L
H
Bank 3
H
H
Remark: H: VIH. L: VIL.
Precharge all banks [PALL]
This command starts a precharge operation for all banks.
Refresh [REF/SELF]
This command starts a refresh operation. There are two types of refresh operation, one is auto-refresh, and another
is self-refresh. For details, refer to the CKE truth table section.
Mode register set/Extended mode register set [MRS/EMRS]
The DDR SDRAM has the two mode registers, the mode register and the extended mode register, to defines how it
works. The both mode registers are set through the address pins (the A0 to the A12, BA0 to BA1) in the mode
register set cycle. For details, refer to "Mode register and extended mode register set".
CKE Truth Table
CKE
Current state
Command
n – 1
n
/CS
/RAS
/CAS
/WE
Address
Notes
Idle
Auto-refresh command (REF)
H
H
L
L
L
H
×
2
Idle
Self-refresh entry (SELF)
H
L
L
L
L
H
×
2
Idle
Power down entry (PDEN)
H
L
L
H
H
H
×
H
L
H
×
×
×
×
Self refresh
Self refresh exit (SELFX)
L
H
L
H
H
H
×
L
H
H
×
×
×
×
Power down
Power down exit (PDEX)
L
H
L
H
H
H
×
Remark: H: VIH. L: VIL.
×
: VIH or VIL.
Notes: 1. All the banks must be in IDLE before executing this command.
2. The CKE level must be kept for 1 CK cycle at least.
L
H
H
×
×
×
×
相關(guān)PDF資料
PDF描述
EDD5108AFTA-5B-E 512M bits DDR SDRAM
EDD5108AFTA-5C-E CAP 1UF 16V +80-20% Y5V SMD-0805 TR-7-PA
EDD5108AFTA-6B-E 512M bits DDR SDRAM
EDD5108AFTA 512M bits DDR SDRAM
EDD5108ABTA-6B 512M bits DDR SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDD5108ADTA-5C 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5108ADTA-6B 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5108ADTA-6B-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5108ADTA-6BL 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5108ADTA-6BL-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
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