參數(shù)資料
型號: EBE41FE4ACFT-6E-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M X 72 DDR DRAM MODULE, DMA240
封裝: ROHS COMPLIANT, FBDIMM-240
文件頁數(shù): 17/22頁
文件大小: 205K
代理商: EBE41FE4ACFT-6E-E
EBE41FE4ACFT
Data Sheet E1091E30 (Ver. 3.0)
4
Advanced Memory Buffer Block Diagram
Demux
PISO
Mux
Link init SM
and control
and CSRs
Link init SM
and control
and CSRs
Sync & idle
pattern
generator
IBIST-TX
failover
DRAM Command
Command
out
DRAM clock
4
DRAM
data and strobes
DRAM
address and
command copy1
Data in
Data out
PLL
Reset
control
Thermal
sensor
DRAM
interface
Core
controller
and CSRs
LAI
controller
SMBus
controller
Command
decoder &
CRC check
Data CRC
generator and
Read FIFO
Reference
clock
/RESET
SMBus
Write data
FIFO
LAI logic
NB LAI Buffer
Init
patterns
DDR state controller
and CSRs
External MemBIST
DDR calibration
Re-synch
10
×2
1
×2
RE-time
Southbound
Data in
10
×2
10
×12
10
×12
Southbound
Data out
Data merge
PISO
Re-synch
14
×6×2
RE-time
Northbound
Data Out
Northbound
Data In
14
×214×2
14
×12
Demux
DRAM clock
4
29
DRAM
address and
command copy2
29
72+18
×2
Data merge
IBIST-RX
IBIST-TX
Note: This figure is a conceptual block diagram of the AMB’s data flow and clock domains.
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