參數(shù)資料
型號(hào): EBE21RD4AGFA-6E-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks)
中文描述: 256M X 72 DDR DRAM MODULE, 0.45 ns, DMA240
封裝: ROHS COMPLIANT, DIMM-240
文件頁(yè)數(shù): 11/22頁(yè)
文件大?。?/td> 173K
代理商: EBE21RD4AGFA-6E-E
EBE21RD4ABHA
Data Sheet E0451E20 (Ver. 2.0)
11
DC Characteristics 1 (TC = 0 to +85
°
C, VDD = 1.8V ± 0.1V, VSS = 0V)
Parameter
Symbol Grade
max
Unit
Test condition
-5C
3770
Operating current
(ACT-PRE)
IDD0
-4A
3360
mA
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are
SWITCHING;
Data bus inputs are SWITCHING
all banks open;
tCK = tCK (IDD);
CKE is L;
Other control and
address bus inputs are
STABLE;
Data bus inputs are
FLOATING
all banks open;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are
SWITCHING;
Data bus inputs are SWITCHING
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-5C
4220
Operating current
(ACT-READ-PRE)
IDD1
-4A
3740
mA
-5C
980
Precharge power-down
standby current
IDD2P
-4A
860
mA
-5C
1520
Precharge quiet standby
current
IDD2Q
-4A
1290
mA
-5C
1700
Idle standby current
IDD2N
-4A
1470
mA
-5C
2060
IDD3P-F
-4A
1830
mA
Fast PDN Exit
MRS(12) = 0
-5C
1520
Active power-down
standby current
IDD3P-S
-4A
1290
mA
Slow PDN Exit
MRS(12) = 1
-5C
3050
Active standby current
IDD3N
-4A
2820
mA
-5C
5120
Operating current
(Burst read operating)
IDD4R
-4A
4370
mA
-5C
5120
Operating current
(Burst write operating)
IDD4W
-4A
4370
mA
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