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參數(shù)資料
| 型號(hào)： | EBE21RD4ABHA-5C-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | GT 7C 7#12 PIN PLUG |
| 中文描述： | 256M X 72 DDR DRAM MODULE, 0.5 ns, DMA240 |
| 封裝： | LEAD FREE, DIMM-240 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 173K |
| 代理商： | EBE21RD4ABHA-5C-E |
EBE21RD4ABHA
Data Sheet E0451E20 (Ver. 2.0)
5
Serial PD Matrix*
1
Byte No.
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
0
Number of bytes utilized by module
manufacturer
Total number of bytes in serial PD
device
Memory type
1
0
0
0
0
0
0
0
80H
128 bytes
1
0
0
0
0
1
0
0
0
08H
256 bytes
2
0
0
0
0
1
0
0
0
08H
DDR2 SDRAM
3
Number of row address
0
0
0
0
1
1
1
0
0EH
14
4
Number of column address
0
0
0
0
1
0
1
1
0BH
11
5
Number of DIMM ranks
0
1
1
1
0
0
0
1
71H
Stack/2 ranks
6
Module data width
0
1
0
0
1
0
0
0
48H
72
7
Module data width continuation
0
0
0
0
0
0
0
0
00H
0
8
Voltage interface level of this assembly 0
DDR SDRAM cycle time, CL = 5
-5C
-4A
SDRAM access from clock (tAC)
-5C
-4A
0
0
0
0
1
0
1
05H
SSTL 1.8V
9
0
0
1
1
1
1
0
1
3DH
3.75ns*
1
0
1
0
1
0
0
0
0
50H
5.0ns*
1
10
0
1
0
1
0
0
0
0
50H
0.5ns*
1
0
1
1
0
0
0
0
0
60H
0.6ns*
1
11
DIMM configuration type
0
0
0
0
0
0
1
0
02H
ECC
12
Refresh rate/type
1
0
0
0
0
0
1
0
82H
7.8
μ
s
13
Primary SDRAM width
0
0
0
0
0
1
0
0
04H
×
4
14
Error checking SDRAM width
0
0
0
0
0
1
0
0
04H
×
4
15
Reserved
SDRAM device attributes:
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
Reserved
0
0
0
0
0
0
0
0
00H
0
16
0
0
0
0
1
1
0
0
0CH
4,8
17
0
0
0
0
0
1
0
0
04H
4
18
0
0
1
1
1
0
0
0
38H
3, 4, 5
19
0
0
0
0
0
0
0
0
00H
0
20
DIMM type information
0
0
0
0
0
0
0
1
01H
Registered
21
SDRAM module attributes
0
0
0
0
0
0
0
0
00H
Normal
22
SDRAM device attributes: General
Minimum clock cycle time at CL = 4
-5C
-4A
Maximum data access time (tAC) from
clock at CL = 4
-5C
-4A
0
0
1
1
0
0
0
0
30H
VDD ± 0.1V
23
0
0
1
1
1
1
0
1
3DH
3.75ns*
1
0
1
0
1
0
0
0
0
50H
5.0ns*
1
24
0
1
0
1
0
0
0
0
50H
0.5ns*
1
0
1
1
0
0
0
0
0
60H
0.6ns*
1
25
Minimum clock cycle time at CL = 3
Maximum data access time (tAC) from
clock at CL = 3
Minimum row precharge time (tRP)
Minimum row active to row active
delay (tRRD)
Minimum /RAS to /CAS delay (tRCD) 0
Minimum active to precharge time
(tRAS)
0
1
0
1
0
0
0
0
50H
5.0ns*
1
26
0
1
1
0
0
0
0
0
60H
0.6ns*
1
27
0
0
1
1
1
1
0
0
3CH
15ns
28
0
0
0
1
1
1
1
0
1EH
7.5ns
29
0
1
1
1
1
0
0
3CH
15ns
30
0
0
1
0
1
1
0
1
2DH
45ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EBE21RD4AEFA-5C-E | 2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AGFA-4A-E | 2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AGFA-5C-E | 2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AGFA-6E-E | 2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4ABHA | GT 13C 13#16 PIN PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EBE21RD4AEFA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AEFA-4A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AEFA-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:2GB Registered DDR2 SDRAM DIMM (256M words x 72 bits, 2 Ranks) |
| EBE21RD4AEFA-6 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:2GB Registered DDR2 SDRAM DIMM |
| EBE21RD4AEFA-6E-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:2GB Registered DDR2 SDRAM DIMM |
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