參數(shù)資料
型號(hào)： EA-QSB-102
廠商： Embedded Artists
文件頁(yè)數(shù)： 2/41頁(yè)
文件大?。?/td> 0K
描述： BOARD QUICK START LPC2106 RS232
標(biāo)準(zhǔn)包裝： 1
系列： LPC2100
類(lèi)型： MCU
適用于相關(guān)產(chǎn)品： LPC2106
所含物品： 板，原型板
LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
10 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.
Functional description
6.1 Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of microprogrammed Complex
Instruction Set Computers. This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The standard 32-bit ARM set.
A 16-bit Thumb set.
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
6.2 On-chip ash program memory
The LPC2104/2105/2106 incorporate a 128 kB ash memory system. This memory may
be used for both code and data storage. Programming of the ash memory may be
accomplished in several ways. It may be programmed In System via the serial port. The
application program may also erase and/or program the ash while the application is
running, allowing a great degree of exibility for data storage eld rmware upgrades, etc.
When on-chip bootloader is used, 120 kB of ash memory is available for user code.
The LPC2104/2105/2106 ash memory provides a minimum of 100000 erase/write cycles
and 20 years of data retention.
6.3 On-chip static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8 bit, 16 bit, and 32 bit. The LPC2104/2105/2106 provide 16/32/64 kB of
static RAM, respectively.
相關(guān)PDF資料
PDF描述
EA-QSB-002 BOARD QUICK START LPC2106
GBA32DRMI CONN EDGECARD 64POS .125 SQ WW
0210490229 CABLE JUMPER 1.25MM .254M 16POS
EA-EDU-009 BOARD EDUCATION LPC2103
0210490228 CABLE JUMPER 1.25MM .229M 16POS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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EAR BUDS 制造商:Molex 功能描述:
EARBUD2600 制造商:3M Electronic Products Division 功能描述:E-A-R Buds Headphones; Ear Protection Type:Corded; Noise Rating:26dB; Body Material:Rubber Jacketed Cord & Polyurethane Foam Earbud Tips/Plugs; Color:Blue & Yellow; Length:44"; Plug Size:One Size Fits All ;RoHS Compliant: NA
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