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參數(shù)資料
| 型號： | E5551A-FP008 |
| 英文描述： | TRANSPONDER|CMOS|SOP|8PIN|PLASTIC |
| 中文描述： | 轉(zhuǎn)發(fā)器|的CMOS |?？苵 8引腳|塑料 |
| 文件頁數(shù)： | 18/21頁 |
| 文件大?。?/td> | 157K |
| 代理商： | E5551A-FP008 |
e5551
Rev. A2, 19-Apr-00
6 (21)
Operating the e5551
General
The basic functions of the e5551 are: supply IC from the
coil, read data from the EEPROM to the reader, write
data into the IC and program these data into the
EEPROM. Several errors can be detected to protect the
memory from being written with the wrong data (see
figure 21).
Supply
The e5551 is supplied via a tuned LC circuit which is con-
nected to the Coil 1 and Coil 2 pads. The incoming RF
(actually a magnetic field) induces a current into the coil.
The on-chip rectifier generates the dc supply voltage
(VDD, VSS pads). Overvoltage protection prevents the IC
from damage due to high-field strengths. Depending on
the coil, the open-circuit voltage across the LC circuit can
reach more than 100 V. The first occurrence of RF trig-
gers a power-on reset pulse, ensuring a defined start-up
state.
Read
Reading is the default mode after power-on reset. It is
done by switching a load between the coil pads on and off.
This changes the current through the IC coil, which can
be detected from the reader unit.
Start-Up
The many different modes of the e5551 are activated after
the first readout of block 0. The modulation is off while
block 0 is read. After this set-up time of 256 field clock
periods, modulation with the selected mode starts.
Any field gap during this initialization will restart the
complete sequence.
Read Datastream
The first block transmitted is block 1. When the last block
is reached, reading restarts with block 1. Block 0, which
contains mode data, is normally never transmitted. How-
ever, the mode register is continuously refreshed with the
contents of EEPROM block 0.
IAC
125 kHz
Energy
Data
Tuned LC
Reader coil
e5551
Figure 8. Application circuit
V
Damping on
Damping off
Read data with configured
modulation and bitrate
Coil 1 – Coil 2
* FC –> Field clocks
Loading block 0 (256 FC
[2 ms)
v2 ms
Power-on
reset
Figure 9. Voltage at Coil1/Coil2 after power-on
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