- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362579 > E28F008BVT70 (Intel Corp.) 8-MBIT (512K X 16, 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY PDF資料下載
參數(shù)資料
| 型號(hào)： | E28F008BVT70 |
| 廠商： | Intel Corp. |
| 英文描述： | 8-MBIT (512K X 16, 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| 中文描述： | 8兆位（為512k × 16，1024K × 8）SmartVoltage啟動(dòng)塊閃存系列 |
| 文件頁(yè)數(shù)： | 17/37頁(yè) |
| 文件大小： | 611K |
| 代理商： | E28F008BVT70 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)
E
4.10
BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY
17
PRODUCT PREVIEW
Clear Block Lock-Bits
Command
All set block lock-bits are cleared in parallel via the
Clear Block Lock-Bits command. With the master
lock-bit not set, block lock-bits can be cleared using
only the Clear Block Lock-Bits command. If the
master lock-bit is set, clearing block lock-bits
requires both the Clear Block Lock-Bits command
and V
HH
on the RP# pin. See Table 5 for a
summary of hardware and software write protection
options.
Clear block lock-bits operation is initiated using a
two-cycle command sequence. A clear block
lock-bits setup is written first. Then, the device
automatically outputs status register data when
read (see Figure 11). The CPU can detect
completion of the clear block lock-bits event by
analyzing the RY/BY# pin output or status register
bit SR.7.
When the operation is complete, status register bit
SR.5 should be checked. If a clear block lock-bit
error is detected, the status register should be
cleared. The CUI will remain in read status register
mode until another command is issued.
This two-step sequence of set-up followed by
execution ensures that block lock-bits are not
accidentally cleared. An invalid Clear Block
Lock-Bits command sequence will result in status
register bits SR.4 and SR.5 being set to
“1.” Also, a
reliable clear block lock-bits operation can only
occur when V
CC
= V
CC1/2
and V
PP
= V
PPH1/2
. If a
clear block lock-bits operation is attempted while
V
PP
≤
V
PPLK
, SR.3 and SR.5 will be set to “1.” In the
absence of this high voltage, the block lock-bits
content are protected against alteration. A suc-
cessful clear block lock-bits operation requires that
the master lock-bit is not set or, if the master lock-
bit is set, that RP# = V
HH
. If it is attempted with the
master lock-bit set and RP# = V
IH
, SR.1 and SR.5
will be set to “1” and the operation will fail. A clear
block lock-bits operation with V
IH
< RP# < V
HH
produce spurious results and should not be
attempted.
If a clear block lock-bits operation is aborted due to
V
PP
or V
CC
transitioning out of valid range or RP#
active transition, block lock-bit values are left in an
undetermined state. A repeat of clear block lock-
bits is required to initialize block lock-bit contents to
known values. Once the master lock-bit is set, it
cannot be cleared.
Table 5. Write Protection Alternatives
Operation
Block Erase or
Program
Master
Lock-Bit
Block
Lock-Bit
0
1
RP#
Effect
V
IH
or V
HH
V
IH
V
HH
Block Erase and Program Enabled
Block is Locked. Block Erase and Program Disabled
Block Lock-Bit Override. Block Erase and Program
Enabled
Set Block Lock-Bit Enabled
Master Lock-Bit is Set. Set Block Lock-Bit Disabled
Master Lock-Bit Override. Set Block Lock-Bit
Enabled
Set Master Lock-Bit Disabled
Set Master Lock-Bit Enabled
Clear Block Lock-Bits Enabled
Master Lock-Bit is Set. Clear Block Lock-Bits
Disabled
Master Lock-Bit Override. Clear Block Lock-Bits
Enabled
X
Set Block
Lock-Bit
0
1
X
X
V
IH
or V
HH
V
IH
V
HH
Set Master
Lock-Bit
Clear Block
Lock-Bits
X
X
V
IH
V
HH
0
1
X
X
V
IH
or V
HH
V
IH
V
HH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| E28F008SA-85 | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| E28F008SC-85 | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| E28F016XS20 | 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY |
| E28F016XS-15 | 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY |
| E28F016XS-20 | 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| E28F008S-120 | 制造商:Intel 功能描述:MLT (ASK FOR BEN) |
| E28F008S3120 | 制造商:Intel 功能描述: |
| E28F008S3-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| E28F008S3150 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| E28F008S3-150 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。