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| 型號： | DT28F800F3T120 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT |
| 中文描述： | 512K X 16 FLASH 2.7V PROM, 120 ns, PDSO56 |
| 封裝： | 16 X 23.70 MM, SSOP-56 |
| 文件頁數(shù)： | 18/47頁 |
| 文件大?。?/td> | 277K |
| 代理商： | DT28F800F3T120 |
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FAST BOOT BLOCK DATASHEET
E
18
PRODUCT PREVIEW
Table 6. Read Configuration Register Definition
RM
R
FC2
FC1
FC0
R
DOC
WC
15
14
13
12
11
10
9
8
BS
CC
R
R
R
BL2
BL1
BL0
7
6
5
4
3
2
1
0
NOTES:
RCR.15 = READ MODE (RM)
0 = Synchronous Burst Reads Enabled
1 = Page-Mode Reads Enabled (Default)
Read mode configuration effects reads from
main blocks. Parameter block, status register,
and identifier reads support single read cycles.
RCR.14 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to
“0.”
RCR.13
–11 = FREQUENCY CONFIGURATION (FC2-0)
001 = Code 1 reserved for future use
010 = Code 2
011 = Code 3
100 = Code 4
101 = Code 5
110 = Code 6
See Section 4.9.2 for information about the
frequency configuration and its effect on the
initial read.
Undocumented combinations of bits
RCR.14–11 are reserved by Intel Corporation
for future implementations and should not be
used.
RCR.10 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to “0.”
RCR.9 = DATA OUTPUT CONFIGURATION (DOC)
0 = Hold Data for One Clock
1 = Hold Data for Two Clocks
Undocumented combinations of bits RCR.10–9
are reserved by Intel Corporation for future
implementations and should not be used.
RCR.8 = WAIT CONFIGURATION (WC)
0 = WAIT# Asserted During Delay
1 = WAIT# Asserted One Data Cycle Before Delay
RCR.7 = BURST SEQUENCE (BS)
0 = Intel Burst Order
1 = Linear Burst Order
RCR.6 = CLOCK CONFIGURATION (CC)
0 = Burst Starts and Data Output on Falling
Clock Edge
1 = Burst Starts and Data Output on Rising
Clock Edge
RCR.5–3 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
These bits are reserved for future use. Set
these bits to “0.”
RCR.2–0 = BURST LENGTH (BL2–0)
001 = 4 Word Burst
010 = 8 Word Burst
111 = Continuous Burst
In the asynchronous page mode, the burst
length always equals four words.
Undocumented combinations of bits RCR.2–0
are reserved by Intel Corporation for future
implementations and should not be used
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| DT28F800F3T95 | FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT |
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| DT28F160S3-120 | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
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