參數(shù)資料
型號： DSPIC33FJ16MC304-I/ML
廠商： Microchip Technology
文件頁數(shù)： 66/76頁
文件大?。?/td> 0K
描述： IC DSPIC MCU/DSP 16K 44QFN
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
特色產(chǎn)品： PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝： 45
系列： dsPIC™ 33F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 40 MIP
連通性： I²C，IrDA，LIN，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，電機(jī)控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 35
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 9x10b/12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-VQFN 裸露焊盤
包裝： 管件
產(chǎn)品目錄頁面： 652 (CN2011-ZH PDF)
配用： AC164335-ND - MODULE SKT FOR 10X10 PM3 44TQFP
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
2007-2012 Microchip Technology Inc.
DS70283K-page 69
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
6.9
Configuration Mismatch Reset
To maintain the integrity of the peripheral pin select
control registers, they are constantly monitored with
shadow registers in hardware. If an unexpected
change in any of the registers occur (such as cell
disturbances caused by ESD or other external events),
a configuration mismatch Reset occurs.
The Configuration Mismatch Flag bit (CM) in the
Reset Control register (RCON<9>) is set to indicate
the
configuration
mismatch
Reset.
Refer
to
Section 10.0 “I/O Ports” for more information on the
configuration mismatch Reset.
6.10
Illegal Condition Device Reset
An illegal condition device Reset occurs due to the
following sources:
Illegal Opcode Reset
Uninitialized W Register Reset
Security Reset
The Illegal Opcode or Uninitialized W Access Reset
Flag bit (IOPUWR) in the Reset Control register
(RCON<14>) is set to indicate the illegal condition
device Reset.
6.10.1
ILLEGAL OPCODE RESET
A device Reset is generated if the device attempts to
execute an illegal opcode value that is fetched from
program memory.
The illegal opcode Reset function can prevent the
device from executing program memory sections that
are used to store constant data. To take advantage of
the illegal opcode Reset, use only the lower 16 bits of
each program memory section to store the data values.
The upper 8 bits should be programmed with 3Fh,
which is an illegal opcode value.
6.10.2
UNINITIALIZED W REGISTER
RESET
Any attempts to use the uninitialized W register as an
address pointer will Reset the device. The W register
array (with the exception of W15) is cleared during all
resets and is considered uninitialized until written to.
6.10.3
SECURITY RESET
If a Program Flow Change (PFC) or Vector Flow
Change (VFC) targets a restricted location in a
protected segment (Boot and Secure Segment), that
operation will cause a security Reset.
The PFC occurs when the Program Counter is
reloaded as a result of a Call, Jump, Computed Jump,
Return, Return from Subroutine, or other form of
branch instruction.
The VFC occurs when the Program Counter is
reloaded with an Interrupt or Trap vector.
CodeGuard Security” for more information on
Security Reset.
6.11
Using the RCON Status Bits
The user application can read the Reset Control regis-
ter (RCON) after any device Reset to determine the
cause of the reset.
Table 6-3 provides a summary of the reset flag bit
operation.
TABLE 6-3:
RESET FLAG BIT OPERATION
Note:
The configuration mismatch feature and
associated reset flag is not available on all
devices.
Note:
The status bits in the RCON register
should be cleared after they are read so
that the next RCON register value after a
device Reset will be meaningful.
Flag Bit
Set by:
Cleared by:
TRAPR (RCON<15>)
Trap conflict event
POR,BOR
IOPWR (RCON<14>)
Illegal opcode or uninitialized
W register access or Security Reset
POR,BOR
CM (RCON<9>)
Configuration Mismatch
POR,BOR
EXTR (RCON<7>)
MCLR Reset
POR
SWR (RCON<6>)
RESET instruction
POR,BOR
WDTO (RCON<4>)
WDT time-out
PWRSAV instruction,
CLRWDT instruction, POR,BOR
SLEEP (RCON<3>)
PWRSAV #SLEEP instruction
POR,BOR
IDLE (RCON<2>)
PWRSAV #IDLE instruction
POR,BOR
BOR (RCON<1>)
POR, BOR
—
POR (RCON<0>)
POR
—
Note: All Reset flag bits can be set or cleared by user software.
相關(guān)PDF資料
PDF描述
PIC18F86J90-I/PT IC PIC MCU FLASH 64KB 80-TQFP
PIC32MX150F128D-I/PT IC MCU 32BIT 128KB FLASH 44-TQFP
PIC24EP64MC206-I/PT MCU 16BIT 64KB FLASH 64TQFP
DSPIC33EP64MC206-I/PT IC DSC 16BIT 64KB FLASH 64TQFP
PIC24EP64GP206-I/PT MCU 16BIT 64KB FLASH 64TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
dsPIC33FJ16MC304T-I/ML 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B DSC 44LD16KB Motor40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ16MC304T-I/PT 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B DSC 16KB Motor40 MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ256GP506A-E/MR 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 64LD 40MIPS 256KB FLASH RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ256GP506A-E/PT 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16Bit 40MIPS 256KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
DSPIC33FJ256GP506A-H/MR 制造商:Microchip Technology Inc 功能描述:16 BIT MCU/DSP 64LD 40MIPS 256KB FLASH - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*