參數(shù)資料
型號: DSPIC30F4012T-20I/SO
廠商: Microchip Technology
文件頁數(shù): 1/66頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 48K 28SOIC
標準包裝: 1,600
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: CAN,I²C,SPI,UART/USART
外圍設備: 高級欠壓探測/復位,電機控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 48KB(16K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: DSPIC30F4012T20IS
2010 Microchip Technology Inc.
DS70102K-page 1
dsPIC30F
1.0
OVERVIEW AND SCOPE
This document defines the programming specification
for the dsPIC30F family of Digital Signal Controllers
(DSCs). The programming specification is required
only for the developers of third-party tools that are used
to program dsPIC30F devices. Customers using
dsPIC30F devices should use development tools that
already provide support for device programming.
This document includes programming specifications
for the following devices:
dsPIC30F2010/2011/2012
dsPIC30F3010/3011/3012/3013/ 3014
dsPIC30F4011/4012/4013
dsPIC30F5011/5013/5015/5016
dsPIC30F6010/6011/6012/6013/6014/6015
dsPIC30F6010A/6011A/6012A/6013A/6014A
2.0
PROGRAMMING OVERVIEW
OF THE dsPIC30F
The dsPIC30F family of DSCs contains a region of on-
chip memory used to simplify device programming.
This region of memory can store a programming
executive, which allows the dsPIC30F to be
programmed faster than the traditional means. Once
the programming executive is stored to memory by an
external programmer (such as Microchip’s MPLAB
ICD 2, MPLAB PM3, PRO MATE II, or MPLAB REAL
ICE), it can then interact with the external
programmer to efficiently program devices.
The programmer and programming executive have a
master-slave relationship, where the programmer is
the master programming device and the programming
executive is the slave, as illustrated in Figure 2-1.
FIGURE 2-1:
OVERVIEW OF dsPIC30F
PROGRAMMING
Two different methods are used to program the chip in
the user’s system. One method uses the Enhanced In-
Circuit Serial Programming (Enhanced ICSP)
protocol and works with the programming executive.
The other method uses In-Circuit Serial Programming
(ICSP) protocol and does not use the programming
executive.
The Enhanced ICSP protocol uses the faster, high-
voltage method that takes advantage of the
programming executive. The programming executive
provides all the necessary functionality to erase,
program and verify the chip through a small command
set. The command set allows the programmer to
program the dsPIC30F without having to deal with the
low-level programming protocols of the chip.
The ICSP programming method does not use the
programming executive. It provides native, low-level
programming capability to erase, program and verify
the chip. This method is significantly slower because it
uses control codes to serially execute instructions on
the dsPIC30F device.
This specification describes the ICSP and Enhanced
ICSP
programming
methods.
the
programming
executive
application
and
application programmer’s interface for the host
programmer.
describes the ICSP programming method.
2.1
Hardware Requirements
In ICSP or Enhanced ICSP mode, the dsPIC30F
requires two programmable power supplies: one for
VDD and one for MCLR. For Bulk Erase programming,
which is required for erasing code protection bits, VDD
must be greater than 4.5 volts. Refer to Section 13.0
for additional hardware parameters.
Programmer
dsPIC30F Device
Programming
Executive
On-chip Memory
2
dsPIC30F Flash Programming Specification
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