- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3875 > DSPIC30F3014T-20I/ML (Microchip Technology)IC DSPIC MCU/DSP 24K 44QFN PDF資料下載
參數(shù)資料
| 型號： | DSPIC30F3014T-20I/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 56/66頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSPIC MCU/DSP 24K 44QFN |
| 標(biāo)準(zhǔn)包裝： | 1,600 |
| 系列： | dsPIC™ 30F |
| 核心處理器： | dsPIC |
| 芯體尺寸： | 16-位 |
| 速度： | 20 MIPS |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 30 |
| 程序存儲器容量： | 24KB（8K x 24） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 1K x 8 |
| RAM 容量： | 2K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 13x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-VQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DSPIC30F3014T20IM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁當(dāng)前第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
dsPIC30F Flash Programming Specification
DS70102K-page 6
2010 Microchip Technology Inc.
5.2
Entering Enhanced ICSP Mode
The Enhanced ICSP mode is entered by holding PGC
and PGD high, and then raising MCLR/VPP to VIHH
(high voltage), as illustrated in Figure 5-2. In this mode,
the code memory, data EEPROM and Configuration
bits can be efficiently programmed using the program-
ming executive commands that are serially transferred
using PGC and PGD.
FIGURE 5-2:
ENTERING ENHANCED
ICSP MODE
5.3
Chip Erase
Before a chip can be programmed, it must be erased.
The Bulk Erase command (ERASEB) is used to perform
this task. Executing this command with the MS
command field set to 0x3 erases all code memory, data
EEPROM and code-protect Configuration bits. The
Chip Erase process sets all bits in these three memory
regions to ‘1’.
Since non-code-protect Configuration bits cannot be
erased, they must be manually set to ‘1’ using multiple
PROGC commands. One PROGC command must be
sent for each Configuration register (see Section 5.7
If Advanced Security features are enabled, then indi-
vidual Segment Erase operations would need to be
performed, depending on which segment needs to be
programmed at a given stage of system programming.
The user should have the flexibility to select specific
segments for programming.
Note:
The Device ID registers cannot be erased.
These registers remain intact after a Chip
Erase is performed.
5.4
Blank Check
The term “Blank Check” means to verify that the device
has been successfully erased and has no programmed
memory cells. A blank or erased memory cell reads as
‘1’. The following memories must be blank checked:
All implemented code memory
All implemented data EEPROM
All Configuration bits (for their default value)
The Device ID registers (0xFF0000:0xFF0002) can be
ignored by the Blank Check since this region stores
device information that cannot be erased. Additionally,
all unimplemented memory space should be ignored
from the Blank Check.
The QBLANK command is used for the Blank Check. It
determines if the code memory and data EEPROM are
erased by testing these memory regions. A ‘BLANK’ or
‘NOT BLANK’ response is returned. The READD
command is used to read the Configuration registers. If
it is determined that the device is not blank, it must be
erased (see Section 5.3 “Chip Erase”) before
attempting to program the chip.
Note 1: The sequence that places the device into
Enhanced ICSP mode places all unused
I/Os in the high-impedance state.
2: Before entering Enhanced ICSP mode,
clock switching must be disabled using
ICSP, by programming the FCKSM<1:0>
bits in the FOSC Configuration register to
‘11’ or ‘10’.
3: When in Enhanced ICSP mode, the SPI
output pin (SDO1) will toggle while the
device is being programmed.
MCLR/VPP
P7
PGD
PGD = Input
PGC
VDD
VIHH
P6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC16LF819T-I/MLTSL | IC PIC MCU FLASH 2KX14 28QFN |
| PIC16LF819T-I/SOTSL | IC PIC MCU FLASH 2KX14 18SOIC |
| PIC18LF8410T-I/PT | IC PIC MCU FLASH 8KX16 80TQFP |
| PIC18F2410T-I/ML | IC PIC MCU FLASH 8KX16 28QFN |
| PIC18F2331T-E/SOG | IC PIC MCU FLASH 4KX16 28SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| dsPIC30F3014T-30I/ML | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 44LD 30MIPS 24 KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| dsPIC30F3014T-30I/PT | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 30MIPS 24 KB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPIC30F4011-20E/ML | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 44LD 20M 48KB FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPIC30F4011-20E/P | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 40LD 20M 48KB FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPIC30F4011-20E/PT | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 Bit MCU/DSP 20M 48KB FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。