參數(shù)資料
型號: DSPIC30F3013-20I/SP
廠商: Microchip Technology
文件頁數(shù): 35/161頁
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 24K 28DIP
產(chǎn)品培訓模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝: 15
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 24KB(8K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: DSPIC30F301320ISP
dsPIC30F2011/2012/3012/3013
DS70139G-page 16
2010 Microchip Technology Inc.
Table 1-1 provides a brief description of device I/O
pinouts and the functions that may be multiplexed to a
port pin. Multiple functions may exist on one port pin.
When multiplexing occurs, the peripheral module’s
functional requirements may force an override of the
data direction of the port pin.
TABLE 1-1:
PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Type
Buffer
Type
Description
AN0 - AN9
I
Analog
Analog input channels.
AVDD
P
Positive supply for analog module. This pin must be connected at all times.
AVSS
P
Ground reference for analog module. This pin must be connected at all times.
CLKI
CLKO
I
O
ST/CMOS
External clock source input. Always associated with OSC1 pin function.
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator
mode. Optionally functions as CLKO in RC and EC modes. Always associated
with OSC2 pin function.
CN0 - CN7
I
ST
Input change notification inputs.
Can be software programmed for internal weak pull-ups on all inputs.
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
I/O
ST
ICD Primary Communication Channel data input/output pin.
ICD Primary Communication Channel clock input/output pin.
ICD Secondary Communication Channel data input/output pin.
ICD Secondary Communication Channel clock input/output pin.
ICD Tertiary Communication Channel data input/output pin.
ICD Tertiary Communication Channel clock input/output pin.
ICD Quaternary Communication Channel data input/output pin.
ICD Quaternary Communication Channel clock input/output pin.
IC1 - IC2
I
ST
Capture inputs 1 through 2.
INT0
INT1
INT2
I
ST
External interrupt 0.
External interrupt 1.
External interrupt 2.
LVDIN
I
Analog
Low-Voltage Detect Reference Voltage Input pin.
MCLR
I/P
ST
Master Clear (Reset) input or programming voltage input. This pin is an
active-low Reset to the device.
OC1-OC2
OCFA
O
I
ST
Compare outputs 1 through 2.
Compare Fault A input.
OSC1
OSC2
I
I/O
ST/CMOS
Oscillator crystal input. ST buffer when configured in RC mode; CMOS
otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator
mode. Optionally functions as CLKO in RC and EC modes.
PGD
PGC
I/O
I
ST
In-Circuit Serial Programming data input/output pin.
In-Circuit Serial Programming clock input pin.
RB0 - RB9
I/O
ST
PORTB is a bidirectional I/O port.
RC13 - RC15
I/O
ST
PORTC is a bidirectional I/O port.
RD0,
RD8-RD9
I/O
ST
PORTD is a bidirectional I/O port.
RF2 - RF5
I/O
ST
PORTF is a bidirectional I/O port.
SCK1
SDI1
SDO1
SS1
I/O
I
O
I
ST
ST
Synchronous serial clock input/output for SPI1.
SPI1 Data In.
SPI1 Data Out.
SPI1 Slave Synchronization.
Legend: CMOS =
CMOS compatible input or output
Analog =
Analog input
ST
=
Schmitt Trigger input with CMOS levels
O
=
Output
I
=
Input
P
=
Power
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