參數(shù)資料
型號(hào): DSPIC30F2010-20E/SP
廠(chǎng)商: Microchip Technology
文件頁(yè)數(shù): 38/49頁(yè)
文件大小: 0K
描述: IC DSPIC MCU/DSP 12K 28DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
標(biāo)準(zhǔn)包裝: 15
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 高級(jí)欠壓探測(cè)/復(fù)位,電機(jī)控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 12KB(4K x 24)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-DIP(0.300",7.62mm)
包裝: 管件
2011 Microchip Technology Inc.
DS70118J-page 43
dsPIC30F2010
6.0
FLASH PROGRAM MEMORY
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
1.
In-Circuit Serial Programming (ICSP)
programming capability
2.
Run-Time Self-Programming (RTSP)
6.1
In-Circuit Serial Programming
(ICSP)
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD respectively), and
three other lines for Power (VDD), Ground (VSS) and
Master Clear (MCLR). This allows customers to manu-
facture boards with unprogrammed devices, and then
program the digital signal controller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
6.2
Run-Time Self-Programming
(RTSP)
RTSP is accomplished using TBLRD (table read) and
TBLWT
(table write) instructions.
With RTSP, the user may erase program memory, 32
instructions (96 bytes) at a time and can write program
memory data, 32 instructions (96 bytes) at a time.
6.3
Table Instruction Operation Summary
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL
and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the EA from a W
register specified in the table instruction, as shown in
FIGURE 6-1:
ADDRESSING FOR TABLE AND NVM REGISTERS
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC Pro-
grammer’s
Reference
Manual”
(DS70157).
0
Program Counter
24 bits
NVMADRU Reg
8 bits
16 bits
Program
Using
TBLPAG Reg
8 bits
Working Reg EA
16 bits
Using
Byte
24-bit EA
1/0
0
1/0
Select
Table
Instruction
NVMADR
Addressing
Counter
Using
NVMADR Reg EA
User/Configuration
Space Select
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