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參數(shù)資料
| 型號(hào)： | DSP56F827E |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 16/60頁 |
| 文件大?。?/td> | 811K |
| 代理商： | DSP56F827E |
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56F827 Technical Data, Rev. 12
16
Freescale Semiconductor
STD
(GPIOC3)
52
Output
Input/Output
SSI Transmit Data (STD)
—This output pin transmits serial data from the SSI
Transmitter Shift Register.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
STFS
(GPIOC4)
51
Input
Input/Output
SSI Serial Transmit Frame Sync (STFS)—
This bidirectional pin is used by
the Transmit section of the SSI as frame sync I/O or flag I/O. The STFS can be
used by both the transmitter and receiver in synchronous mode. It is used to
synchronize data transfer and can be an input or output pin.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
STCK
(GPIOC5)
50
Input/ Output
Input/Output
SSI Serial Transmit Clock (STCK)
—This bidirectional pin provides the serial
bit rate clock for the transmit section of the SSI. The clock signal can be
continuous or gated. It can be used by both the transmitter and receiver in
synchronous mode.
Port C GPIO
—This is a General Purpose I/O (GPIO) pin with the capability of
being individually programmed as input or output.
After reset, the default state is GPIO input.
SCLK
(GPIOF4)
102
Input/Output
Input/Output
SPI Serial Clock
—In master mode, this pin serves as an output, clocking
slaved listeners. In slave mode, this pin serves as the data clock input.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is SCLK.
MOSI
(GPIOF5)
101
Input/Output
Input/Output
SPI Master Out/Slave In (MOSI)
—This serial data pin is an output from a
master device and an input to a slave device. The master device places data
on the MOSI line a half-cycle before the clock edge that the slave device uses
to latch the data.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
MISO
(GPIOF6)
100
Input/Output
Input/Output
SPI Master In/Slave Out (MISO)
—This serial data pin is an input to a master
device and an output from a slave device. The MISO line of a slave device is
placed in the high-impedance state if the slave device is not selected.
Port F GPIO
—This General Purpose I/O (GPIO) pin can be individually
programmed as input or output.
After reset, the default state is MISO.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56F827FG80 | 16-bit Digital Signal Controllers |
| DSP56F827FG80E | 16-bit Digital Signal Controllers |
| DSP56F827 | 16-bit Hybrid Controller(16位混合控制器) |
| DSP8-08AC | Phase-leg Rectifier Diode ISOPLUS220 |
| DSP8-08 | Phase-leg Rectifier Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827E/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:5 |
| DSP56F827EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 Evaluation Module Hardware User＇s Manual |
| DSP56F827FG80 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 80Mhz/ 40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSP56F827FG80E | 功能描述:16位微控制器 - MCU 80Mhz/40MIPS RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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