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| 型號： | DSP56858FVE |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 16/64頁 |
| 文件大?。?/td> | 956K |
| 代理商： | DSP56858FVE |
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56858 Technical Data, Rev. 6
16
Freescale Semiconductor
HACK
HRRQ
GPIOB15
C7
119
Input
Open Drain
Output
Input/Output
Host Acknowledge (HACK)
—When the HI08 is programmed for
HRMS=0 functionality (typically used on a single-data-strobe bus), this
input has two functions: (1) provide a Host Acknowledge signal for
DMA transfers or (2) to control handshaking and provide a Host
Interrupt Acknowledge compatible with the MC68000 family
processors.
These pins are disconnected internally during reset.
Receive Host Request (HRRQ)
—This signal
is the Receive Host
Request output when the HI08 is programmed for HRMS=1
functionality and is typically used on a double-data-strobe bus.
Port B GPIO (15)
—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
TIO0
GPIOG0
B9
114
Input
/Output
Input/Output
Timer Input/Outputs (TIO0)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIOG0
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
TIO1
GPIOG1
C9
112
Input
/Output
Input/Output
Timer Input/Outputs (TIO1)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (1)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
TIO2
GPIOG2
D9
111
Input
/Output
Input/Output
Timer Input/Outputs (TIO2)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (2)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
TIO3
GPIOG3
B10
110
Input
/Output
Input/Output
Timer Input/Outputs (TIO3)
—This pin can be independently
configured to be either a timer input source or an output flag.
Port G GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
IRQA
G2
22
Input
External Interrupt Request A and B
—The IRQA and IRQB inputs
are asynchronous external interrupt requests that indicate that an
external device is requesting service. A Schmitt trigger input is used
for noise immunity. They can be programmed to be level-sensitive or
negative-edge-triggered. If level-sensitive triggering is selected, an
external pull-up resistor is required for Wired-OR operation.
IRQB
F5
23
MODE A
GPIOH0
F4
17
Input
Input/Output
Mode Select (MODE A)
—During the bootstrap process MODE A
selects one of the eight bootstrap modes.
Port H GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin after
the bootstrap process has completed.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
BGA
Pin No.
LQFP
Pin No.
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56858VF120 | 16-bit Digital Signal Controllers |
| DSP5685XEVMUM | Feature Phone Software Application Product Brief |
| DSP5685XUM | Feature Phone Software Application Product Brief |
| DSP56F800ERM | Feature Phone Software Application Product Brief |
| DSP56F801FA60E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56858PB_D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56858 Digital Signal Processor Product Brief |
| DSP56858VF120 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSP5685XEVMUM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Feature Phone Software Application Product Brief |
| DSP5685XSFPPB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Feature Phone Software Application |
| DSP5685XUM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
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