- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378593 > DSP202KP 16-bit fixed point DSP with Flash PDF資料下載
參數(shù)資料
| 型號(hào)： | DSP202KP |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點(diǎn) DSP |
| 文件頁(yè)數(shù)： | 5/19頁(yè) |
| 文件大小： | 106K |
| 代理商： | DSP202KP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
DSP201/202
5
DSP201 PIN ASSIGNMENTS
PIN #
NAME
DESCRIPTION
1
2
3
4
5
6
7
8
V
A
–
–5V Analog Power.
No Internal Connection.
No Internal Connection.
Analog Ground.
No Internal Connection.
+5V Digital Power.
+5V Digital Power.
Reset. If LOW, DAC output will be 0V after two
convert commands, and will remain there as long
as the Reset input isLOW. If HIGH, normal
operation proceeds. Two convert commands are
required after Reset goes from LOW to HIGH
before the output will relate to the input word.
Select Sync Format In. Tie HIGH for use with
Motorola and TI DSP ICs. Tie LOW for use with
AT&T DSP ICs.
Select Word Length In. If HIGH, DSP201 accepts
first 16 bits of data. If LOW, DSP201 accepts first
18 bits of data.
Data Synchronization Output. Active HIGH when
SSF is HIGH, active LOW when SSF is LOW.
Data Transfer Clock Input.
Serial Data In. MSB first, Binary Two’s Comple-
ment format.
No Internal Connection.
Convert Command In. DAC is updated on falling
edge, and initiates clocking new data in.
Digital Ground.
Latch Enable In. If LOW, DAC output will be
latched with new data word on falling edge of
Convert Command. If HIGH, Convert Commands
will be ignored.
Digital Ground.
Digital Ground.
–5V Digital Power.
Voltage Out.
Analog Ground.
VOS Adjust In.
MSB Adjust In.
Trim Reference Out for MSB adjustment.
+5V Analog Power.
Digital Ground.
Analog Ground.
AGND
V
D
+
V
D
+
RESET
9
SSF
10
SWL
11
SYNC
12
13
XCLK
SIN
14
15
CONV
16
17
DGND
ENABLE
18
19
20
21
22
23
24
25
26
27
28
DGND
DGND
V
–
VOUT
AGND
VOS
MSB
VPOT
V
+
DGND
AGND
DSP201 PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V –
AGND
V +
V +
RESET
SSF
SWL
SYNC
XCLK
SIN
AGND
DGND
V +
VPOT
MSB
VOS
AGND
VOUT
V –
DGND
DGND
ENABLE
DGND
CONV
DSP201
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56004FJ81 | SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS |
| DSP56004ROM | SYMPHONY AUDIO DSP FAMILY 24-BIT DIGITAL SIGNAL PROCESSORS |
| DSP56721 | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPA56720AG | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
| DSPA56721AF | SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP-204 | 制造商:SYNERGY 制造商全稱:SYNERGY MICROWAVE CORPORATION 功能描述:POWER DIVIDERS 0ì : 4-WAY |
| DSP-206 | 制造商:SYNERGY 制造商全稱:SYNERGY MICROWAVE CORPORATION 功能描述:POWER DIVIDERS 0ì : 4-WAY |
| DSP-207 | 制造商:SYNERGY 制造商全稱:SYNERGY MICROWAVE CORPORATION 功能描述:POWER DIVIDERS 0ì : 4-WAY |
| DSP-209 | 制造商:SYNERGY 制造商全稱:SYNERGY MICROWAVE CORPORATION 功能描述:POWER DIVIDERS 0ì : 2-WAY |
| DSP-212 | 制造商:SYNERGY 制造商全稱:SYNERGY MICROWAVE CORPORATION 功能描述:POWER DIVIDERS 0ì : 2-WAY |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。