參數(shù)資料
型號(hào): DSP202
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 具有閃存的 16 位定點(diǎn) DSP
文件頁數(shù): 11/19頁
文件大?。?/td> 106K
代理商: DSP202
DSP201/202
11
GAIN ERROR
Gain error on the DSP201 or DSP202 cannot be directly
adjusted. If required in a specific application, gain can be
trimmed out at the system level by adjusting the gain used
in an output amplifier stage, such as would be used in any
active output filter. In this case, the bipolar zero error should
be adjusted first as discussed above. Then, the gain on the
output amplifier should be adjusted to minimize the devia-
tion from ideal for –Full Scale (1000...000; 8000 hex or
20000 hex) and +Full Scale (0111...1111; 7FFF hex or
1FFFF hex.)
An alternative for calibrating on a bench is to tie SIN (DSP201
pin 13) or SINA and SINB (DSP202 pins 13 and 14) HIGH,
and provide a Bit Clock and periodic Convert Commands.
This loads 1111...1111 (FFFF
HEX
or 3FFFF
HEX
), driving the
output to 1LSB below 0V. Then periodically bring RESET
(pin 8) LOW for at least two Convert Commands, which is
the equivalent of loading all 0s, so the output is 0V. Now
the output can be adjusted for an ideal transition step.
ADJUSTING BIPOLAR ZERO ERROR
If it is important in a specific application to adjust bipolar
zero error, the user should first adjust the MSB trim circuits,
and then use the offset adjust circuits to adjust the outputs to
0V with input codes of all 0s (0000...0000; 0000 hex or
00000 hex.) In this case, it is not possible to also trim offset
at –Full Scale, as described above.
FIGURE 2. DSP201 Power Supply Connections and Optional Adjust Circuits.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DSP201
–5V
100k
100k
2.2μF
AGND
V +
VPOT
MSB
VOS
AGND
V –
DGND
DGND
2.2μF
V –
AGNDB
V +
V +
D
–5V
+5V
2.2μF
2.2μF
+5V
–5V
+5V
100k
3.3k
Offset Adjust
–5V
0.01μF
+
0.01μF
+
0.01μF
+
0.01μF
+
MSB Adjust
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