參數(shù)資料
型號(hào)： DSD1792ADBG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 16/57頁(yè)
文件大?。?/td> 0K
描述： IC DAC 24BIT SER 28-SSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 47
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 335mW
工作溫度： -25°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 28-SSOP
包裝： 管件
輸出數(shù)目和類型： 4 電流，單極
采樣率（每秒）： 200k
DSD1792
SLES067B MARCH 2003 REVISED NOVEMBER 2006
www.ti.com
23
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 18
R/W
0
1
0
1
0
ATLD
FMT2
FMT1
FMT0
DMF1
DMF0
DME
MUTE
R/W: Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
ATLD: Attenuation Load Control
This bit is available for read and write.
Default value: 0
ATLD = 0
Attenuation control disabled (default)
ATLD = 1
Attenuation control enabled
The ATLD bit is used to enable loading of the attenuation data contained in registers 16 and 17. When ATLD = 0, the
attenuation settings remain at the previously programmed levels, ignoring new data loaded from registers 16 and 17. When
ATLD = 1, attenuation data written to registers 16 and 17 is loaded normally.
FMT[2:0]: Audio Interface Data Format
These bits are available for read and write.
Default value: 101
For the external digital filter interface mode (DFTH mode), this register is operated as shown in the Application for
Interfacing With an External Digital Filter section of this data sheet.
FMT[2:0]
Audio Data Format Selection
000
16-bit standard format, right-justified data
001
20-bit standard format, right-justified data
010
24-bit standard format, right-justified data
011
24-bit MSB-first, left-justified data
100
16-bit I2S-format data
101
24-bit I2S-format data (default)
110
Reserved
111
Reserved
The FMT[2:0] bits are used to select the data format for the serial audio interface.
DMF[1:0]: Sampling Frequency Selection for the De-Emphasis Function
These bits are available for read and write.
Default value: 00
DMF[1:0]
De-Emphasis Sampling Frequency Selection
00
Disabled (default)
01
48 kHz
10
44.1 kHz
11
32 kHz
The DMF[1:0] bits are used to select the sampling frequency used by the digital de-emphasis function when it is enabled
by setting the DME bit. The de-emphasis curves are shown in the TYPICAL PERFORMANCE CURVES section of this
data sheet.
For the DSD mode, analog FIR filter performance can be selected using this register. Filter response plots are shown in
the TYPICAL PERFORMANCE CURVES section of this data sheet. A register map is shown in the Configuration for the
DSD Interface Mode section of this data sheet.
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DSD1792DB 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
DSD1792DBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
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