
DS87C550
5 of 50
PLCC/
CLCC
50-57
57
56
55
54
53
52
51
50
QFP
51-58
58
57
56
55
54
53
52
51
38-42
45-47
38
39
40
41
42
45
46
47
18-20
23-27
SIGNAL NAME
DESCRIPTION
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
Port 0-I/O - AD0-7.
Port 0 is an open-drain 8-bit, bi-directional general-purpose
I/O port. When used in this mode pullup resistors are required to provide a logic 1
output. As an alternate function, Port 0 operates as a multiplexed address/data bus
to access off-chip memory or peripherals. In this mode, the LSB of the memory
address is output on the bus during the time that ALE is high. When ALE falls to
a logic 0, the port transitions to a bi-directional data bus. In this mode, the port
provides active high drivers for logic 1 output. The reset condition of Port 0 is tri-
state (i.e., the open drain devices are off).
39-46
39
40
41
42
43
44
45
46
24-31
P2.0 (A8)
P2.1 (A9)
P2.2 (A10)
P2.3 (A11)
P2.4 (A12)
P2.5 (A13)
P2.6 (A14)
P2.7 (A15)
P3.0-P3.7
Port 2-I/O Address A15:A8.
Port 2 functions as an 8-bit bi-directional I/O port
or alternately as an external address bus (A15-A8). The reset condition of Port 2 is
logic high I/O state. In this state, weak pullups hold the port high allowing the
pins to be used as an input or output as described above for Port 1. As an alternate
function Port 2 can function as MSB of the external address bus. This bus can be
used to read external memory or peripherals.
Port 3 - I/O.
Port 3 functions as an 8-bit bi-directional I/O port or alternately as
an interface for External Interrupts, Serial Port 0, Timer 0 & 1 Inputs, and
RD
and
WR
strobes. When functioning as an I/O port, these pins operate as indicated
above for Port 1. The alternate modes of Port 3 are detailed below.
Port
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Port 4 - I/O.
Port 4 functions as an 8-bit bi-directional I/O port or alternately as
an interface to Timer 2’s Capture Compare functions. When functioning as an I/O
port, these pins operate as indicated in the Port 1 description. The alternate modes
of Port 4 are detailed below.
Alternate Mode
RXD0
TXD0
INT0
24
25
26
27
28
29
30
31
7-14
18
19
20
23
24
25
26
27
80
1-2
4-8
Serial Port 0 Input
Serial Port 0 Output
External Interrupt 0
External Interrupt 1
Timer 0 External Input
Timer 1 External Input
External Data Memory Write Strobe
External Data Memory Read Strobe
INT1
T0
T1
WR
RD
P4.0-P4.7
Port 4 Alternate Mode
P4.0
CMSR0
P4.1
CMSR1
P4.2
CMSR2
P4.3
CMSR3
P4.4
CMSR4
P4.5
CMSR5
P4.6
CMT0
P4.7
CMT1
7
8
9
10
11
12
13
14
80
1
2
4
5
6
7
8
Timer 2 compare match set/reset output 0
Timer 2 compare match set/reset output 1
Timer 2 compare match set/reset output 2
Timer 2 compare match set/reset output 3
Timer 2 compare match set/reset output 4
Timer 2 compare match set/reset output 5
Timer 2 compare match toggle output 0
Timer 2 compare match toggle output 1