參數(shù)資料
型號: DS80C320-ECL
廠商: Maxim Integrated Products
文件頁數(shù): 23/38頁
文件大?。?/td> 0K
描述: IC MCU HI SPEED 33MHZ 44-TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 160
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-TQFP
包裝: 托盤
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
3 of 38
Figure 1. Block Diagram
PIN DESCRIPTION
PIN
DIP
PLCC
TQFP
NAME
FUNCTION
40
44
38
VCC
+5V (+3V for DS80C323)
20
22, 23
16, 17
GND
Digital Circuit Ground
9
10
4
RST
Reset Input. The RST input pin contains a Schmitt voltage input to
recognize external active-high reset inputs. The pin also employs an
internal pulldown resistor to allow for a combination of wired OR
external reset sources. An RC is not required for power-up, as the device
provides this function internally.
18
20
14
XTAL2
19
21
15
XTAL1
Crystal Oscillator Pins. XTAL1 and XTAL2 provide support for
parallel-resonant, AT-cut crystals. XTAL1 acts also as an input in the
event that an external clock source is used in place of a crystal. XTAL2
serves as the output of the crystal amplifier.
29
32
26
PSEN
Program Store-Enable Output, Active Low. This signal is commonly
connected to external ROM memory as a chip enable. PSEN provides an
active-low pulse width of 2.25 XTAL1 cycles with a period of four
XTAL1 cycles. PSEN is driven high when data memory (RAM) is being
accessed through the bus and during a reset condition.
DS80C320/
DS80C323
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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