參數(shù)資料
型號: DS5002FPM-16
英文描述: Secure Microprocessor Chip
中文描述: 安全微處理器芯片
文件頁數(shù): 12/25頁
文件大小: 445K
代理商: DS5002FPM-16
DS5002FP Secure Microprocessor Chip
12 of 25
PIN
NAME
FUNCTION
into A15 for a 128k x 8 SRAM.
CE3
is lithium-backed and remains at a logic high when V
CC
falls below V
LI
.
Chip Enable 4. This chip enable is provided to access a fourth 32k block of memory. It
connects to the chip-enable input of one SRAM. When MSEL = 0, this signal is unused.
CE4
is lithium-backed and remains at a logic high when V
CC
falls below V
LI
.
Peripheral Enable 1. Accesses data memory between addresses 0000h and 3FFFh when the
PES bit is set to a logic 1. Commonly used to chip enable a byte-wide real-time clock such as
the DS1283.
PE1
is lithium-backed and will remain at a logic high when V
CC
falls below V
LI
.
Connect
PE1
to battery-backed functions only.
Peripheral Enable 2. Accesses data memory between addresses 4000h and 7FFFh when the
PES bit is set to a logic 1.
PE2
is lithium-backed and will remain at a logic high when V
CC
falls
below V
LI
. Connect
PE2
to battery-backed functions only.
Peripheral Enable 3. Accesses data memory between addresses 8000h and BFFFh when the
PES bit is set to a logic 1.
PE3
is not lithium-backed and can be connected to any type of
peripheral function. If connected to a battery-backed chip, it will need additional circuitry to
maintain the chip enable in an inactive state when V
CC
< V
LI
.
Peripheral Enable 4. Accesses data memory between addresses C000h and FFFFh when
the PES bit is set to a logic 1.
PE4
is not lithium-backed and can be connected to any type of
peripheral function. If connected to a battery-backed chip, it will need additional circuitry to
maintain the chip enable in an inactive state when V
CC
< V
LI
.
Invokes the bootstrap loader on a falling edge. This signal should be debounced so that only
one edge is detected. If connected to ground, the micro enters bootstrap loading on power-
up. This signal is pulled up internally.
This I/O pin (open drain with internal pullup) indicates that the power supply (V
CC
) has fallen
below the V
CCMIN
level and the micro is in a reset state. When this occurs, the DS5002FP
drives this pin to a logic 0. Because the micro is lithium-backed, this signal is guaranteed
even when V
CC
= 0V. Because it is an I/O pin, it also forces a reset if pulled low externally.
This allows multiple parts to synchronize their power-down resets.
This output goes to a logic 0 to indicate that the micro has switched to lithium backup. This
corresponds to V
CC
< V
LI
. Because the micro is lithium-backed, this signal is guaranteed even
when V
CC
= 0V. The normal application of this signal is to control lithium powered current to
isolate battery-backed functions from non-battery-backed functions.
Memory Select. This signal controls the memory size selection. When MSEL = +5V, the
DS5002FP expects to use 32k x 8 SRAMs. When MSEL = 0V, the DS5002FP expects to use
a 128k x 8 SRAM. MSEL must be connected regardless of partition, mode, etc.
Self-Destruct Input. An active high on this pin causes an unlock procedure. This results in the
destruction of Vector RAM, Encryption Keys, and the loss of power from V
CCO
. This pin
should be grounded if not used.
This is a non-battery-backed version of
CE1
. It is not generally useful since the DS5002FP
cannot be used with EPROM due to its encryption.
No Connect
62
CE4
78
PE1
3
PE2
22
PE3
23
PE4
32
PROG
42
VRST
43
PF
14
MSEL
53
SDI
72
CE1N
73
N.C.
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