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參數(shù)資料
| 型號(hào)： | DS4550E+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 9B 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 接口： | I²C，JTAG |
| 輸入/輸出數(shù)： | 9 |
| 中斷輸出： | 無 |
| 頻率 - 時(shí)鐘： | 400kHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 包括： | EEPROM |
General Description
The DS4550 is a 9-bit, nonvolatile (NV) I/O expander
with 64 bytes of NV user memory controlled by either
an I2C-compatible serial interface or an IEEE 1149.1
JTAG port. The DS4550 offers a digitally programmable
alternative to hardware jumpers and mechanical
switches that are being used to control digital logic
nodes. Each I/O pin is independently configurable. The
outputs are open drain with selectable pullups. Each
output has the ability to sink up to 16mA, and since the
device is NV, it powers up in the desired state allowing
it to control digital logic inputs immediately on power-
up without having to wait for the host CPU to initiate
control.
Applications
RAM-Based FPGA Bank Switching for Multiple
Profiles
Selecting Between Boot Flash
Setting ASIC Configurations/Profiles
Servers
Network Storage
Routers
Telecom Equipment
PC Peripherals
Features
Programmable Replacement for Mechanical
Jumpers and Switches
Nine NV Inputs/Outputs
64-Byte NV User Memory (EEPROM)
I2C-Compatible Serial Interface and JTAG
Up to 8 Devices can be Multidropped on the Same
I2C Bus
IEEE 1149.1 Boundary Scan Compliant
Open-Drain Outputs with Configurable Pullups
Outputs Capable of Sinking 16mA
Low Power Consumption
Wide Operating Voltage Range: 2.7V to 5.5V
Operating Temperature Range: -40°C to +85°C
DS4550
I2C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory
______________________________________________ Maxim Integrated Products
1
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
GND
I/O_8
I/O_7
I/O_6
I/O_3
I/O_2
I/O_1
I/O_0
TOP VIEW
I/O_5
A2
TDO
TDI
TCK
A1
A0
I/O_4
12
11
9
10
SCL
SDA
VCC
TMS
TSSOP
DS4550
VCC
FPGA
CLOCK
GENERATOR
CPU SPEED
SELECT
A0
A1
A2
GND
0.1
μF
VCC
4.7k
I2C
INTERFACE
JTAG
INTERFACE
DS4550
SCL
SDA
TCK
TMS
TDI
TDO
I/O_0
I/O_1
I/O_2
I/O_3
I/O_4
I/O_5
I/O_6
I/O_7
I/O_8
Pin Configuration
Typical Operating Circuit
Rev 0; 9/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
DS4550E
-40
°C to +85°C
20 TSSOP
Add “/T&R” for tape and reel orders.
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