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參數(shù)資料
| 型號： | DS4424N+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 7BIT 4CH 5.5V 14-TDFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 7 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 14-TDFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極 |
| 采樣率（每秒）： | * |
DS4422/DS4424
Two-/Four-Channel, I2C, 7-Bit Sink/Source
Current DAC
_______________________________________________________________________________________
3
Note 1:
All voltages with respect to ground. Currents entering the IC are specified positive, and currents exiting the IC are negative.
Note 2:
Input resistors (RFS) must be between the speciifed values to ensure the device meets its accuracy and linearity specifications.
Note 3:
Supply current specified with all outputs set to zero current setting. A0 and A1 are connected to GND. SDA and SCL are con-
nected to VCC. Excludes current through RFS resistors (IRFS). Total current including IRFS is ICC + (2 x IRFS).
Note 4:
The output-voltage range must be satisfied to ensure the device meets its accuracy and linearity specifications.
Note 5:
Temperature drift excludes drift caused by external resistor.
Note 6:
Differential linearity is defined as the difference between the expected incremental current increase with respect to position
and the actual increase. The expected incremental increase is the full-scale range divided by 127.
Note 7:
Guaranteed by design.
Note 8:
Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.
The expected value is a straight line between the zero and the full-scale values proportional to the setting.
Note 9:
Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C standard-mode timing.
Note 10: CB—total capacitance of one bus line in pF.
OUTPUT CURRENT SOURCE CHARACTERISTICS (continued)
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC source
0.32
Output Current Variation Due to
Power-Supply Change
DC sink
0.42
%/V
DC source, VOUT measure at 1.2V
0.16
Output Current Variation Due to
Output-Voltage Change
DC sink, VOUT measure at 1.2V
0.16
%/V
Output Leakage Current at Zero
Current Setting
IZERO
-1
+1
μA
Output Current Differential
Linearity
DNL
(Notes 6, 7)
-0.5
+0.5
LSB
Output Current Integral Linearity
INL
(Notes 7, 8)
-1
+1
LSB
AC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
fSCL
(Note 9)
0
400
kHz
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
μs
Hold Time (Repeated) START
Condition
tHD:STA
0.6
μs
Low Period of SCL
tLOW
1.3
μs
High Period of SCL
tHIGH
0.6
μs
Data Hold Time
tDH:DAT
0
0.9
μs
Data Setup Time
tSU:DAT
100
ns
START Setup Time
tSU:STA
0.6
μs
SDA and SCL Rise Time
tR
(Note 10)
20 + 0.1CB
300
ns
SDA and SCL Fall Time
tF
(Note 10)
20 + 0.1CB
300
ns
STOP Setup Time
tSU:STO
0.6
μs
SDA and SCL Capacitive
Loading
CB
(Note 10)
400
pF
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