Two/Four-Channel, I2C Adjustable Current DAC 8 ___________________" />
參數(shù)資料
型號(hào)： DS4402N+
廠商： Maxim Integrated Products
文件頁數(shù)： 8/9頁
文件大?。?/td> 0K
描述： IC DAC 2CH I2C ADJ 14-TDFN
標(biāo)準(zhǔn)包裝： 100
位數(shù)： 5
數(shù)據(jù)接口： I²C
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 14-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 14-TDFN-EP（3x3）
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： *
DS4402/DS4404
Two/Four-Channel, I2C Adjustable Current DAC
8
______________________________________________________________________
Applications Information
Example Calculations
for an Adjustable Power Supply
Using the typical circuit, assuming a typical output volt-
age of 2.0V, a feedback voltage of 0.8V, R1 = 500
Ω,
and R2 = 333
Ω, to adjust or margin the supply 20%
requires a full-scale current equal to [(0.2 x 2.0V) /
500
Ω = 800A]. Using Equation 1, RFS can be calculat-
ed [RFS = (VREF / 800A) x (31 / 4) = 11.9k
Ω]. The cur-
rent DAC in this configuration allows the output voltage
to be stepped linearly from 1.6V to 2.4V using 63 set-
tings. This corresponds to a resolution of 12.7mV/step.
Power-Supply Feedback Voltage
The feedback voltage for adjustable power supplies
must be between 0.5V and VCC - 0.5V for the DS4402/
DS4404 to properly sink/source currents for adjusting
the voltage.
I2C Reset on Address Change
In addition to defining the I2C slave address, the DS4402/
DS4404 address select inputs have an alternate function.
Changing the address select inputs resets the I2C inter-
face. This function aborts the current transaction and puts
the SDA driver into a high-impedance state. This hard-
ware reset function should never be required because it
is achievable through software, but it does provide an
alternative way of resetting the I2C interface, if needed.
VCC Decoupling
To achieve the best results when using the DS4402/
DS4404, decouple the power supply with a 0.01F or
0.1F capacitor. Use a high-quality ceramic surface-
mount capacitor if possible. Surface-mount compo-
nents minimize lead inductance, which improves
performance, and ceramic capacitors tend to have
adequate high-frequency response for decoupling
applications.
Layout Considerations
Care should be taken to ensure that traces underneath
the DS4402/DS4404 do not short with the exposed pad.
The exposed pad should be connected to the signal
ground, or can be left unconnected.
SLAVE
ADDRESS*
START
a7
a6
a5
a4
a3
a2
a1
R/W
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MSB
LSB
MSB
LSB
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
READ/
WRITE
REGISTER/MEMORY ADDRESS
b7
b6
b5
b4
b3
b2
b1
b0
DATA
STOP
SINGLE BYTE WRITE
-WRITE RESISTOR
F9h TO 00h
SINGLE BYTE READ
-READ RESISTOR F8h
START
REPEATED
START
A1h
MASTER
NACK
STOP
1 0100000
11111 000
F8h
10100 001
1 0100000
11111 001
A0h
F9h
STOP
DATA
EXAMPLE I2C TRANSACTIONS (WHEN A0 AND A1 ARE N.C.)
TYPICAL I2C WRITE TRANSACTION
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PINS A0 AND A1 (SEE TABLE 1).
00 000 000
A0h
A)
B)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
Figure 4. I2C Communication Examples
Chip Information
TRANSISTOR COUNT: 10,992
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
14 TDFN-EP
T1433+1
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