參數(shù)資料
型號(hào): DS4000KI/WBGA
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/16頁(yè)
文件大?。?/td> 0K
描述: IC OSC TCXO 19.44MHZ 24-BGA
標(biāo)準(zhǔn)包裝: 135
類型: 溫度 - 補(bǔ)償晶體振蕩器(TCXO)
頻率: 19.44MHz
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 1.5mA
工作溫度: 0°C ~ 70°C
封裝/外殼: 24-BBGA
包裝: 托盤
供應(yīng)商設(shè)備封裝: 24-WBGA(11x9)
安裝類型: 表面貼裝
DS4000 Digitally Controlled TCXO
12 of 16
Figure 3. Data Transfer On 2-Wire Serial Bus
DATA TRANSFER
Figures 4 and 5 detail how data transfer is accomplished on the 2-wire bus.
Depending on the R/
W bit in the transmission protocols as shown, two types of data transfer are possible:
1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received
byte. Data is transferred with the most significant bit (MSB) first.
2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave
address). The slave then returns an acknowledge bit. Next follows a number of data bytes transmitted by the
slave to the master. The master returns an acknowledge bit after all received bytes other than the last byte. At
the end of the last received byte, a “not acknowledge” is returned. The master device generates all of the serial
clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or with a
repeated START condition. Since a repeated START condition is also the beginning of the next serial transfer,
the bus is not released.
12
3-5
6789
SDA
SCL
START
CONDITION
STOP CONDITION
OR REPEATED
START CONDITION
89
3-7
12
ACK
REPEATED IF
MORE BYTES ARE
TRANSFERRED
MSB
SLAVE
ADDRESS
R/W BIT
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
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