參數(shù)資料
型號: DS3903
元件分類: 數(shù)字電位計
英文描述: Triple 128-Position Nonvolatile Digital Potentiometer
中文描述: 三路、128抽頭、非易失數(shù)字電位器
文件頁數(shù): 8/11頁
文件大小: 619K
代理商: DS3903
D
Triple 128-Position Nonvolatile
Digital Potentiometer
8
______________________________________________________________________
word consists of 101000 binary followed by A0 then the
R/W bit. If the R/W bit is high, a read operation is initiat-
ed. If the R/W bit is low, a write operation is initiated.
For a device to become active, the value of A0 must be
the same as the hard-wired address pins on the
DS3903. Upon a match of written and hard-wired
addresses, the DS3903 outputs a zero for one clock
cycle as an acknowledge. If the address does not
match, the DS3903 returns to a low-power mode.
Write Operations
After receiving a matching device address byte with the
R/W bit set low, the device goes into the write mode of
operation. The master must transmit an 8-bit EEPROM
memory address to the device to define the address
where the data is to be written. After the byte has been
received, the DS3903 transmits a zero for one clock
cycle to acknowledge the memory address has been
received. The master must then transmit an 8-bit data
word to be written into this memory address. The
DS3903 again transmits a zero for one clock cycle to
acknowledge the receipt of the data byte. At this point,
the master must terminate the write operation with a stop
condition. The DS3903 then enters an internally timed
STOP
CONDITION
OR REPEATED
START
CONDITION
REPEATED IF MORE BYTES
ARE TRANSFERRED
ACK
START
CONDITION
ACK
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
SLAVE ADDRESS
MSB
SCL
SDA
R/W
DIRECTION
BIT
1
2
6
7
8
9
1
2
8
9
3–7
Figure
2. 2-Wire Data Transfer Protocol
SDA
SCL
t
HD:STA
t
LOW
t
HIGH
t
R
t
F
t
BUF
t
HD:DAT
t
SU:DAT
REPEATED
START
t
SU:STA
t
HD:STA
t
SU:STO
t
SP
STOP
START
Figure
3. 2-Wire AC Characteristics
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