參數(shù)資料
型號: DS3803
英文描述: 1024k Flexible NV SRAM SIMM
中文描述: 1024k靈活的非易失SRAM上海藥物研究所
文件頁數(shù): 9/10頁
文件大?。?/td> 231K
代理商: DS3803
DS3803
9 of 10
3.
t
WP
is specified as the logical AND of
CE
and
WE
. t
WP
is measured from the latter of
CE
or
WE
going low to the earlier of
CE
or
WE
going high.
4.
t
DS
is measured from the earlier of
CE
or
WE
going high.
5.
These parameters are sampled with a 5 pF load and are not 100% tested.
6.
If the
CE
low transition occurs simultaneously with or later than the
WE
low transition, the output
buffers remain in a high impedance state during this period.
7.
If the
CE
high transition occurs prior to or simultaneously with the
WE
high transition, the output
buffers remain in a high impedance state during this period.
8.
If
WE
is low or the
WE
low transition occurs prior to or simultaneously with the
CE
low transition,
the output buffers remain in a high impedance state during this period.
9.
Each DS3803 has a built-in switch that disconnects the lithium source until V
CC
is first applied by the
user. The expected t
DR
is defined as accumulative time in the absence of V
CC
starting from the time
power is first applied by the user.
10.
In a power-down condition the voltage on any pin may not exceed the voltage on V
CC
.
11.
t
WR1
, t
DH1
are measured from
WE
going high.
12.
t
WR2
, t
DH2
are measured from
CE
going high.
DC TEST CONDITIONS
Outputs Open
Cycle = 200 ns
All Voltages are Referenced to Ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL gate
Input Pulse Levels: 0 - 3.0 V
Timing Measurements Reference Levels:
Input - 1.5V
Output - 1.5V
Input Pulse Rise and Fall Times: 5 ns
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相關(guān)代理商/技術(shù)參數(shù)
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