I2C, 8-Channel Gamma Buffer with EEPROM _________________________________" />
參數(shù)資料
型號(hào): DS3508E+
廠商: Maxim Integrated Products
文件頁數(shù): 12/14頁
文件大小: 0K
描述: IC GAMMA BUFFER 8CH 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 358
應(yīng)用: TFT-LCD 面板:伽瑪緩沖器
電路數(shù): 8
電流 - 電源: 2mA
電流 - 輸出 / 通道: 6mA
電壓 - 電源,單路/雙路(±): 9 V ~ 15.5 V
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
DS3508
I2C, 8-Channel Gamma Buffer with EEPROM
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
TYPE
FUNCTION
1
SCL
Input
Serial Clock Input. I2C clock input.
2
SDA
Input/
Output
Serial Data Input/Output (Open Drain). I2C bidirectional data pin that requires a pullup
resistor to realize high logic levels.
3
GND
Ground
4
A0
Input
Address Input. Determines I2C slave address.
5
VHH
Reference
Input
High-Voltage DAC, Upper Reference
6
VHM
Reference
Input
High-Voltage DAC, Lower Reference
7
VLM
Reference
Input
Low-Voltage DAC, Upper Reference
8
VLL
Reference
Input
Low-Voltage DAC, Lower Reference
9
VDD
Power
Analog Supply
10, 11
N.C.
No Connection
12
GM8
13
GM7
14
GM6
15
GM5
Output
Gamma Analog Outputs 5–8. These pins are the low-voltage gamma outputs
referenced to VLL and VLM.
16
GM4
17
GM3
18
GM2
19
GM1
Output
Gamma Analog Outputs 1–4. These pins are the high-voltage gamma outputs
referenced to VHH and VHM.
20
VCC
Power
Digital Supply
Detailed Description
The DS3508 provides eight independent DACs that
allow precise and repeatable setting of gamma curves.
The DS3508 provides four high-voltage DACs
(GM1–GM4) that operate between VHH and VHM and
four low-voltage DACs (GM5–GM8) that operate
between VLM and VLL. Each of the DACs provides 8
bits of resolution.
The DS3508 DAC output voltages are independently
controlled by the data stored in that channel’s SRAM
register. The MODE bit in the volatile control register
(CR bit 7) determines how I2C data is written to the
SRAM and EEPROM gamma data registers. Reading
and writing to the SRAM/EEPROM gamma data regis-
ters is based on the state of the MODE bit as follows:
MODE = 0:
I2C writes to memory addresses
00h–07h write to both SRAM 1–8 and
EEPROM 1–8.
I2C reads from addresses 00h–07h
read from SRAM 1–8.
MODE = 1:
I2C writes to addresses 00h–07h write
to SRAM 1–8.
I2C reads from addresses 00h–07h
read from SRAM 1–8.
Regardless of the MODE bit setting, all I2C reads of
address 00–07h return the contents of the SRAM regis-
ters. Setting MODE = 1 allows for quick writing of SRAM
without the added delay of writing to the associated
EEPROM register. The data that is stored in EEPROM and
SRAM remains unchanged if the MODE bit is toggled.
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