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參數(shù)資料
| 型號： | DS34LV87TMX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE DVR QUAD CMOS DIF 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 4/0 |
| 規(guī)程： | RS422 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | *DS34LV87TMX *DS34LV87TMX/NOPB DS34LV87TMX DS34LV87TMX-ND DS34LV87TMX/NOPBTR |
SNLS116D – JULY 2006 – REVISED APRIL 2013
SWITCHING CHARACTERISTICS
(1) (2)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tPHLD
Differential Propagation Delay
RL = 100Ω, CL = 50 pF
6
10.5
16
ns
High to Low
tPLHD
Differential Propagation Delay
6
11
16
ns
Low to High
tSKD
Differential Skew
0.5
2.0
ns
|tPHLD–tPLHD|
tSK1
Skew, Pin to Pin (same device)
1.0
2.0
ns
tSK2
Skew, Part to Part(3)
3.0
5.0
ns
tTLH
Differential Transition Time
4.2
10
ns
Low to High (20% to 80%)
tTHL
Differential Transition Time
4.7
10
ns
High to Low (80% to 20%)
tPHZ
Disable Time High to Z
12
20
ns
tPLZ
Disable Time Low to Z
9
20
ns
tPZH
Enable Time Z to High
22
32
ns
tPZL
Enable Time Z to Low
22
32
ns
fMAX
Maximum Operating Frequency(4)
32
MHz
(1)
f = 1 MHz, tr and tf ≤ 6 ns (10% to 90%).
(2)
See TIA/EIA-422-B specifications for exact test conditions.
(3)
Devices are at the same VCC and within 5°C within the operating temperature range.
(4)
All channels switching, output duty cycle criteria is 40%/60% measured at 50%. This parameter is ensured by design and
characterization.
4
Copyright 2006–2013, Texas Instruments Incorporated
Product Folder Links: DS34LV87T
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