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參數(shù)資料
| 型號(hào)： | DS33M33N+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 18/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MAPPER ETHERNET 256CSBGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 應(yīng)用： | 數(shù)據(jù)傳輸 |
| 接口： | SPI |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 封裝/外殼： | 256-BGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 256-CSBGA（17x17） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
DS33M30/M31/M33 DATA SHEET
Rev: 010809
6 of 21
Manual or automatic one-second update of performance monitoring counters
Single reference clock for all data rates using internal clock rate adapter (CLAD)
Detection of loss of transmit clock and loss of receive clock
Supports two packages:
10mm, 144-pin CSBGA Package (DS33M30)
17mm, 256-pin CSBGA Package (DS33M31/DS33M33)
1.8V, 2.5V, 3.3V supplies
IEEE 1149.1 JTAG boundary scan
Software access to device ID and silicon revision
Development support includes evaluation kit, driver source code, and reference designs
1.2
TDM Feature Overview
Figure 1-1 describes the TDM side feature.
Figure 1-1. TDM Functional Blocks
STS-3
Section/Line
Termination
STS-3
Section/Line
Termination
M
U
X
STS-3 Path
Termination
(VC-4)
STS-1 Path
Termination
(VC-3)
M
U
X
DS3/E3
MAPPER
M
U
X
DS3/E3
Desync
Add/Drop
DS3/E3
Framer
Line
DS3/E3
Framer
EoPoS
EoS (VC-3/STS-1)
SERDES
EoS (VC-4/STS-3c)
Line DS3/E3 side
B3ZS/
HDB3
line coder
M
U
X
to
Encapsulated
Ethernet
STS-3/STM-1
Side
Drop Direction
Add Direction
Supports M23 DS3, C-bit DS3, G.751 E3, and G.832 E3 facilities
Mapping/demapping of three DS3/E3 tributaries to/from STS-3/STM-1 through STS-1 or AU-3 or TU-3/AU-4
Fully integrated and compliant DS3/E3 mapper/demapper and synchronizers/desynchronizers per
Telcordia, ANSI, and ITU standards
High speed DS3/E3/STS-1/STS-3 overhead insertion/extraction with full access to all overhead bytes
Full-featured DS3/E3/STS-1/STS-3 defect and performance monitoring (PM) support Large PM counters
for accumulation intervals up to one second
Loopback capabilities at both STS-3/STM-1 side and line DS3/E3 side
Dual STS-3/STM-1 155.52Mbps serial interfaces with receive clock recovery and transmit clock synthesis
From a single reference clock the CLAD (cLock rate adapter) generates clock references for DS3
(44.736MHz), E3 (34.368MHz), and/or STS-3/STM-1 reference (77.76/19.44MHz)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS33M33N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Ethernet Over SONET/SDH Mapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS33M33N+W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Ethernet Over SONET/SDH Mapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS33R11 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS33R11+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS33R11+CJ2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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