參數(shù)資料
型號: DS3153
英文描述: Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
中文描述: 單/雙/三/四路、DS3/E3/STS-1 LIU
文件頁數(shù): 37/60頁
文件大?。?/td> 788K
代理商: DS3153
DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
37 of 60
13.
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Lead with Respect to V
SS
(except V
DD
)
Supply Voltage Range (V
DD
) with Respect to V
SS
Ambient Operating Temperature Range
Junction Operating Temperature Range
Storage Temperature Range
Soldering Temperature
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device. Ambient operating temperature range
when device is mounted on a four-layer JEDEC test board with no airflow.
Note:
The typical values listed in Tables 13-A through 13-I are not production tested.
Table 13-A. Recommended DC Operating Conditions
(T
A
= -40°C to +85°C)
PARAMETER
SYMBOL
ELECTRICAL CHARACTERISTICS
-0.3V to +5.5V
-0.3V to +3.63V
-40°C to +85°C
-40°C to +125°C
-55°C to +125°C
See IPC/JEDEC J-STD-020A Specification
CONDITIONS
MIN
TYP
MAX
UNITS
Logic 1
V
IH
2.0
5.5
V
Logic 0
V
IL
-0.3
+0.8
V
Supply Voltage
V
DD
3.135
3.3
3.465
V
Table 13-B. DC Characteristics
(V
DD
= 3.3V 5%, T
A
= -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
DS3151
DS3152
DS3153
DS3154
DS3151
DS3152
DS3153
DS3154
MIN
TYP
MAX
100
200
300
400
80
150
225
300
UNITS
Supply Current (Note 1)
I
DD
mA
Supply Current, Transmitters Tri-Stated
(All
TTSn
Low) (Note 2)
I
DDTTS
mA
Power-Down Current (All TPD, RPD
Control Bits High)
I
DDPD
DS315x (Note 2)
55
70
mA
Lead Capacitance
C
IO
7
pF
Input Leakage
I
IL
(Note 3)
-50
+10
A
Output Leakage (when High-Z)
I
LO
(Note 3)
-10
+10
A
Output Voltage (I
O
= -4.0mA)
V
OH
2.4
V
DD
V
Output Voltage (I
O
= +4.0mA)
V
OL
0
0.4
V
Note 1:
TCLKn = STMCLK = 51.84MHz; TXPn/TXNn driving all ones into 75 resistive loads; analog loopback enabled; all other inputs at V
DD
or grounded; all other outputs open.
Note 2:
TCLKn = STMCLK = 51.84MHz; other inputs at V
DD
or grounded; digital outputs left open circuited.
Note 3:
0V < V
IN
< V
DD
.
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