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參數(shù)資料
| 型號(hào)： | DS31256+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 3/183頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CTRLR HDLC 256-CHANNEL 256BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 控制器類(lèi)型： | HDLC 控制器 |
| 接口： | 串行 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 500mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 256-BBGA |
| 供應(yīng)商設(shè)備封裝： | 256-BGA（27x27） |
| 包裝： | 管件 |
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DS31256 256-Channel, High-Throughput HDLC Controller
100 of 183
buffers have been filled or wait until the completed packet data has been written. The DMA always
writes to the done queue when it has finished receiving a packet, even if the threshold has not been met.
Done-Queue Burst Writing
The DMA can write to the done queue in bursts, which allows for a more efficient use of the PCI bus.
The DMA can hand off descriptors to the done queue in groups rather than one at a time, freeing up the
PCI bus for more time-critical functions.
An internal FIFO stores up to eight done-queue descriptors (8 dwords as each descriptor occupies one
dword). The host must configure the FIFO for proper operation through the receive DMA queues-control
(RDMAQ) register (see the following).
When enabled through the receive done-queue FIFO-enable (RDQFE) bit, the done-queue FIFO does not
write to the done queue until it reaches the high watermark. When the done-queue FIFO reaches the high
watermark (which is six descriptors), it attempts to empty the done-queue FIFO by burst writing to the
done queue. Before it writes to the done queue, it checks (by examining the receive done-queue host read
pointer) to ensure the done queue has enough room to empty the done-queue FIFO. If the done queue
does not have enough room, then it only burst writes enough descriptors to keep from overflowing the
done queue. If the FIFO detects that there is no room for any descriptors to be written, it sets the status
bit for the receive DMA done-queue write error (RDQWE) in the status register for DMA (SDMA). It
does not write to the done queue nor does it increment the write pointer. In such a scenario, packets can
be lost and unrecoverable. If the done-queue FIFO can write descriptors to the done queue, it burst writes
them, increments the write pointer, and sets the status bit for the receive DMA done-queue write
(RDQW) in the status register for DMA (SDMA). See Section 5 for more details on status bits.
Done-Queue FIFO Flush Timer
To ensure the done-queue FIFO gets flushed to the done queue on a regular basis, the DMA uses the
receive done-queue FIFO flush timer (RDQFFT) to determine the maximum wait time between writes.
The RDQFFT is a 16-bit programmable counter that is decremented every PCLK divided by 256. It is
only monitored by the DMA when the receive done-queue FIFO is enabled (RDQFE = 1). For a 33MHz
PCLK, the timer is decremented every 7.76
s. For a 25MHz clock, it is decremented every 10.24s.
Each time the DMA writes to the done queue it resets the timer to the count placed into it by the host. On
initialization, the host sets a value into the RDQFFT that indicates the maximum time the DMA should
wait in between writes to the done queue. For example, with a PCLK of 33MHz, the range of wait times
is from 7.8
s (RDQFFT = 0001h) to 508ms (RDQFFT = FFFFh). With a PCLK of 25MHz, the wait
times range from 10.2
s (RDQFFT = 0001h) to 671ms (RDQFFT = FFFFh).
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| DS31412N | IC 12CH DS3/3 FRAMER 349-BGA |
| DS3150TN | IC LIU T3/E3/STS-1 IND 48-TQFP |
| DS3154N+ | IC LIU DS3/E3/STS-1 QD 144CSBGA |
| DS3164+ | IC ATM/PACKET PHY QUAD 400-BGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS31256+ | 功能描述:輸入/輸出控制器接口集成電路 256Ch High Thruput HDLC Cntlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| DS31256B | 功能描述:輸入/輸出控制器接口集成電路 256Ch High Thruput HDLC Cntlr RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| DS31256DK | 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類(lèi)型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類(lèi)型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS31256-W+ | 制造商:Maxim Integrated Products 功能描述:ENVOY 256 CHANNEL HDLC - WAIVER - Rail/Tube |
| DS312BNC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Industrial Control IC |
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