MAX14820
IO-Link Device Transceiver
17
Maxim Integrated
DO Fault Detection
The device registers a DoFault event when a short circuit
is present at the DO output for 440s. A short condition
exists when the load current on the DO driver exceeds
the 200mA (typ) DO current limit. When a short-circuit
condition is detected, the DO driver enters autoretry
mode. In autoretry mode the device periodically checks
whether the error is still present. Autoretry attempts last
for 440s (typ) and occur every 26ms (typ). When a
DoFault error is detected, the DoFault and DoFaultInt bits
are set, IRQ asserts, and the driver is turned off 440s
(typ) after the start of the DO faults.
Reverse-Polarity Protection
The device is protected against reverse-polarity connec-
tions on VCC, C/Q, DO, DI, and GND. Any combination
of these pins can be connected to DC voltages up to
40V (max). A short to 40V results in a current flow of less
than 500FA.
Ensure that the maximum voltage between any of these
pins does not exceed 40V.
5V and 3.3V Linear Regulators
The device includes two internal regulators to generate 5V
(V5) and 3.3V (LDO33). LDO5 is specified for 10mA total
external load current (i.e., LDO33 + V5) when bypassed
with a 0.1F capacitor to ground. Add the compensation
network shown in
Figure 7 to draw up to 30mA of total
external load current from the 5V LDO. LDO33 is speci-
fied at 20mA. The input of V5, LDOIN, can be powered
from VP, the protected 24V supply output, or to another
voltage in the 7V to 36V range.
If the external circuits that are powered by the linear reg-
ulators require an input bypass capacitance larger than
100nF for 5V or 1F for 3.3V, a compensation network
must be added on V5 and/or LDO33. The compensation
network consists of a 10
W series resistor and a capaci-
tor equal to the value required by the external circuit,
as shown in
Figure 14. The capacitors C33* and C5*
in
Figure 14 represent the capacitance required by the
external circuits.
Figure 14 does not show any protection
diodes for simplicity.
When the internal 5V LDO is not used, V5 becomes the
supply input for the internal analog and digital func-
tions and thus has to be supplied externally so that
the MAX14820 operates normally. The 5V LDO can be
disabled by connecting LDOIN to V5. Apply an external
voltage of 4.75V to 5.25V to V5 when the LDO is disabled.
Use the LDO33Dis bit in the Mode register to disable
for more information. V5 and LDO33 are not protected
against short circuits.
Power-Up
The C/Q and DO driver outputs and the UV output are
high impedance when VCC, V5, VL, and/or LDO33 volt-
ages are below their respective undervoltage thresh-
olds during power-up. UV goes low and the drivers are
enabled when all these voltages exceed their respective
undervoltage lockout thresholds.
The drivers are automatically disabled if VCC, V5, or VL
falls below its threshold.
Undervoltage Detection
The device monitors VCC, V5, VL, and optionally LDO33
for undervoltage conditions. UV is high impedance when
any monitored voltage falls below its UVLO threshold.
VCC, V5, and VL undervoltage detection cannot be dis-
abled. When VCC falls below the VCCUVLO threshold, the
UV24 and UV24Int bits are set, UV asserts high, and IRQ
asserts low.
The SPI register contents are unchanged while V5 is pres-
ent, regardless of the state of VCC and LDO33. The SPI
interface is not accessible and IRQ is not available when
UV is asserted due to a V5 or VL undervoltage event.
When the internal 3.3V LDO regulator voltage (VLDO33)
falls below the LDO33 undervoltage lockout threshold,
the UV33Int bit in the Status register is set and IRQ
asserts. UV asserts if the UV33En bit in the Mode register
is set to 1.
The UV output deasserts once the undervoltage condi-
tion is removed; however, bits in the Status register and
the IRQ output are not cleared until the Status register
has been read.
Figure 7. V5 Compensation Network
MAX14836
10
0.1F
1F
V5
VL
5V
LDO33
3.3V