
DS26519 16-Port T1/E1/J1 Transceiver
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Table 13-2. AC Characteristics—Microprocessor Bus Timing
(VDD = 3.3V ±5%, TA = 0°C to +70°C for DS26519G; VDD = 3.3V ±5%, TA = -40°C to +85°C for
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Setup Time for A[13:0] Valid to
CSB
Active
t1
0
ns
Setup Time for
CSB Active to Either RDB,
or
WRB Active
t2
0
ns
Delay Time from Either
RDB or DSB
Active to D[7:0] Valid
t3
(Note 2)
175
ns
Hold Time from Either
RDB or WRB
Inactive to
CSB Inactive
t4
0
ns
Hold Time from
CSB or RDB or DSB
Inactive to D[7:0] Tri-State
t5
5
20
ns
Wait Time from
WRB Active to Latch Data
t6
40
ns
Data Setup Time to
WRB Inactive
t7
10
ns
Data Hold Time from
WRB Inactive
t8
2
ns
Address Hold from
WRB Inactive
t9
0
ns
Write Access to Subsequent Write/Read
Access Delay Time
t10
(Note 2)
30
ns
Note 1:
The timing parameters in this table are guaranteed by design (GBD).
Note 2:
If supplying a 1.544MHz MCLK, the FREQSEL bit must be set to meet this timing.