
DS26401 Octal T1/E1/J1 Framer
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8.7.1 Receive AIS-CI and RAI-CI Detection
AIS-CI is a repetitive pattern of 1.26 seconds. It consists of 1.11 seconds of an unframed all ones pattern and 0.15
seconds of all ones modified by the AIS-CI signature. The AIS-CI signature is a repetitive pattern 6176 bits in length
in which, if the first bit is numbered bit 0, bits 3088, 3474 and 5790 are logical zeros and all other bits in the pattern
are logical ones (T1.403). AIS-CI is an unframed pattern and therefore is defined for all T1 framing formats. The
RAIS-CI bit is set when the AIS-CI pattern has been detected and RAIS (RRTS1.2) is set. RAIS-CI is a latched bit
and should be cleared by the host when read. RAIS-CI will continue to set approximately every 1.2 seconds that
the condition is present. The host will need to ‘poll’ the bit, in conjunction with the normal AIS indicators to determine
when the condition has cleared.
RAI-CI is a repetitive pattern within the ESF data link with a period of 1.08 seconds. It consists of sequentially
interleaving 0.99 seconds of “00000000 11111111” (right-to-left) with 90ms of “00111110 11111111”. The RRAI-CI
bit is set when a bit-oriented code of “00111110 11111111” is detected while RRAI (RRTS1.3) is set. The RRAI-CI
detector uses the receive BOC filter bits (RBF0 & RBF1) located in RBOCC to determine the integration time for
RAI-CI detection. Like RAIS-CI, the RRAI-CI bit is latched and should be cleared by the host when read. RRAI-CI
will continue to set approximately every 1.1 seconds that the condition is present. The host will need to ‘poll’ the bit,
in conjunction with the normal RAI indicators to determine when the condition has cleared. It may be useful to
enable the 200ms ESF RAI integration time with the RAIIE control bit (RCR2.1) in networks that use RAI-CI.
8.8 T1 Receive-Side Digital Milliwatt Code Generation
Receive-side digital milliwatt code generation involves using the receive-digital milliwatt registers (T1RDMR1/2/3) to
determine which of the 24 T1 channels of the T1 line going to the backplane should be overwritten with a digital
milliwatt pattern. The digital milliwatt code is an 8-byte repeating pattern that represents a 1kHz sine wave
(1E/0B/0B/1E/9E/8B/8B/9E). Each bit in the T1RDMRx registers, represents a particular channel. If a bit is set to 1,
then the receive data in that channel is replaced with the digital milliwatt code. If a bit is set to zero, no replacement
occurs.
Register Name:
RDMWE1, RDMWE2, RDMWE3
Register Description:
T1 Receive-Digital Milliwatt-Enable Registers
Register Address:
03Ch, 03Dh, 03Eh [+ (200h x n) : where n = 0 to 7, for Ports 1 to 8]
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RDMWE1
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RDMWE2
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RDMWE3
Bits 0 to 7 / Receive-Digital Milliwatt Enable for Channels 1 to 24 (CH1 to CH24)
0 = Do not affect the receive data associated with this channel.
1 = Replace the receive data associated with this channel with digital milliwatt code.