
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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6.3 Transmitter
NRZ data arrives on TPOS and TNEG on the transmit system side. The TPOS and TNEG data is sampled on the
falling edge of TCLK (
Figure 10-12
).
The data is encoded with HDB3 or B8ZS or NRZ encoding when single-rail mode is selected (only TPOS as the
data source). When in single-rail mode only, BPV errors can be inserted for test purposes by register
BEIR
.
Preencoded data is expected when dual-rail mode is selected. The encoded data passes through a jitter attenuator
if it is enabled for the transmit path. A digital sequencer and DAC generate transmit waveforms compliant with
T1.102 and G.703 pulse masks.
A line driver drives an internal matched-impedance circuit for provision of 100 , 110 , 120 , and 75 termination.
The DS26303 drivers have short-circuit driver-fail-monitor detection. There is an OE pin that can high-Z the
transmitter outputs for protection switching. The individual transmitters can be placed in high impedance by register
OEB.
The DS26303 also has functionality for powering down the transmitters individually. The registers that control
the transmitter operation are shown in
Table 6-3.
Table 6-1. Telecommunications Specification Compliance for DS26303 Transmitters
TRANSMITTER FUNCTION
AMI Coding, B8ZS Substitution, DS1 Electrical
Interface
T1 Telecom Pulse Mask Compliance
T1 Telecom Pulse Mask Compliance
Transmit Electrical Characteristics for E1
Transmission and Return Loss Compliance
TELECOMMUNICATIONS COMPLIANCE
ANSI T1.102
ANSI T1.403
ANSI T1.102
ITUT G.703
Table 6-2. Registers Related to Control of DS26303 Transmitters
REGISTER NAME
ACRONYM
FUNCTION
Transmit All-Ones Enable
TAOE
Transmit All-Ones Enable.
Driver Fault Monitor Status
DFMS
Driver Fault Status.
Driver Fault Monitor Interrupt Enable
DFMIE
Driver Fault Status Interrupt Mask.
Driver Fault Monitor Interrupt Status
DFMIS
Driver Fault Status Interrupt Mask.
Selection of the jitter attenuator in the transmit receive or not
used and code for B8ZS or HDB3 substitution.
The transmitter that the template select applies to.
The TS2 to TS0 bits for selection of the templates for
transmitter and match impedance for the receiver.
This bits can be used to place the transmitter outputs in high-
impedance mode.
Selects the MCLK frequency used for transmit and receive.
This register can be used to select between single-rail and
dual-rail mode.
The individual LIU line codes can be selected to overwrite
the global setting.
Individual transmitters can be powered down.
This register allows the individual transmitters short-circuit
protection disable.
This register is used for sending different BERT patterns for
the individual transmitters.
Global Configuration Register
GC
Template Select Transmitter
TST
Template Select
TS
Output Enable Configuration
Register
Master Clock Selection
OEB
MC
Single-Rail Mode Select Register
SRMS
Line Code Selection
LCS
Transmit Power-Down
Individual Short-Circuit-Protection
Disable
TPDE
ISCPD
BERT Control Register
BTCR