- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379183 > DS2482-100 Single-Channel 1-Wire Master PDF資料下載
參數(shù)資料
| 型號： | DS2482-100 |
| 英文描述： | Single-Channel 1-Wire Master |
| 中文描述： | 單通道1-Wire主控制器 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大小： | 261K |
| 代理商： | DS2482-100 |
DS2482-800: Eight-Channel 1-Wire Master
13 of 22
Figure 6. Write-0 Time Slot
Pullup (see Fig. 2)
DS2482 Pulldown
t
REC0
V
cc
V
IH1
V
IL1
0V
t
F1
t
SLOT
t
W0L
t
MSR
Figure 7. Write-1 and Read-Data Time Slot
Pullup (see Fig. 2)
DS2482 Pulldown
1-W Slave Pulldown
V
cc
V
IH1
V
IL1
0V
t
F1
t
SLOT
t
W1L
t
MSR
NOTE on Figure 7
: Depending on its internal state, a 1-Wire slave device will transmit data to its master (e.g., the
DS2482). When responding with a 0, a 1-Wire slave will start pulling the line low during t
W1L
; its internal timing
generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, a 1-
Wire slave will not hold the line low at all, and the voltage starts rising as soon as t
W1L
is over. 1-Wire device data
sheets use the term t
RL
instead of t
W1L
to describe a read-data time slot. Technically, t
RL
and t
W1L
have identical
specifications and cannot be distinguished from each other.
1-Wire Write Byte
Command Code
A5h
Command Parameter
Data Byte
Description
Writes single data byte to selected 1-Wire IO channel.
To write commands or data to a 1-Wire IO channel; equivalent to
executing eight 1-Wire Single Bit commands, but faster due to less I2C
traffic.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code and data byte will not be acknowledged if 1WB = 1 at the
time the command code is received and the command will be ignored.
8 × t
SLOT
+ maximum 262.5ns, counted from falling edge of the last bit (LS
bit) of the data byte.
Begins maximum 262.5ns after falling SCL edge of the LS bit of the data
byte (i.e., before the data byte acknowledge).
NOTE
: The bit order on the I2C bus and the 1-Wire line is different.
(1-Wire: LS-bit first; I2C: MS-bit first) Therefore, 1-Wire activity cannot
begin before the DS2482 has received the full data byte.
Read Pointer Position
Status Register (for busy polling)
Status Bits Affected
1WB (set to 1 for 8 × t
SLOT
)
Configuration Bits Affected
1WS, SPU, APU apply
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2482S-100 | Single-Channel 1-Wire Master |
| DS2482S-800 | Eight-Channel 1-Wire Master |
| DS2502-E48 | 48-Bit Node Address Chip |
| DS26401 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| DS26401N | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2482-100_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master |
| DS2482-101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master with Sleep Mode |
| DS2482-101_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single-Channel 1-Wire Master with Sleep Mode |
| DS2482-800 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Channel 1-Wire Master |
| DS2482-800_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Channel 1-Wire Master |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。