參數(shù)資料
型號: DS2432X
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Programmable ROM
英文描述: 1K X 1 1-WIRE SERIAL EEPROM, PBGA6
封裝: UCSP-8
文件頁數(shù): 4/16頁
文件大?。?/td> 168K
代理商: DS2432X
Abridged Data Sheet
DS2432
12 of 14
READ/WRITE TIMING DIAGRAM Figure 11 (continued)
Read-data Time Slot
VPULLUP
VIH MIN
VPULLUP MIN
VIL MAX
0V
tLOWR
tREC
tSLOT
MASTER *
SAMPLING
WINDOW
tSU
tRDV
tRELEASE
RESISTOR
MASTER
DS2432
*The optimal sampling point for the master is as close as possible to the end time of the tRDV period
without exceeding tRDV. For the case of a Read-one time slot, this maximizes the amount of time for the
pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will
occur before the fastest 1-Wire device releases the line (tRELEASE = 0).
CRC GENERATION
With the DS2432 there are two different types of CRCs (Cyclic Redundancy Checks). One CRC is an
8-bit type. It is computed at the factory and lasered into the most significant byte of the 64-bit ROM. The
equivalent polynomial function of this CRC is X
8
+ X
5
+ X
4
+ 1. To determine whether the ROM data has
been read without error the bus master can compute the CRC value from the first 56 bits of the 64-bit
ROM and compare it to the value read from the DS2432. This 8-bit CRC is received in the true form
(non-inverted) when reading the ROM.
The other CRC is a 16-bit type, which is used for error detection with Memory and SHA-1 function
commands. For details (including Figure 12) see the full version of the data sheet.
相關(guān)PDF資料
PDF描述
DS2432P 1K X 1 1-WIRE SERIAL EEPROM, PDSO6
DS2433 512 X 8 1-WIRE SERIAL EEPROM, PBCY3
DS2433X 4K X 1 1-WIRE SERIAL EEPROM, UUC2
DS2433S 512 X 8 1-WIRE SERIAL EEPROM, PDSO8
DS2434S SPECIALTY MEMORY CIRCUIT, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
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DS2432X+U 制造商:Maxim Integrated Products 功能描述:1-W EEPROM 1KB W/SHA-1 UCSP PARTIAL - Rail/Tube
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