參數(shù)資料
型號(hào)： DS2432
元件分類(lèi)： DRAM
英文描述： 1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine
中文描述： 1Kb、保護(hù)型1-Wire EEPROM，帶有SHA-1引擎
文件頁(yè)數(shù)： 19/30頁(yè)
文件大?。?/td> 165K
代理商： DS2432
PRELIMINARY
Read Memory [F0h]
The read memory command may be used to read all memory except for the secret. Attempting to read the
secret will not reveal any data. After issuing the command, the master must provide the 2-byte target
address. After these two bytes, the master reads data beginning from the target address and may continue
until address 0097h. If the master continues reading the result will be logic 1’s. It is important to realize
that the target address registers will point to the last byte read. The ending offset/data status byte and the
scratchpad are unaffected.
DS2432
19 of 30
The hardware of the DS2432 provides a means to accomplish error-free writing to the memory section.
To safeguard reading data in the 1-Wire environment and to simultaneously speed up data transfers, it is
recommended to packetize data into data packets of the size of one memory page each. Such a packet
would typically store a master-calculated 16-bit CRC with each page of data to ensure rapid, error-free
data transfers that eliminate having to read a page multiple times to determine if the received data is
correct or not. (See Application Note 114 for the recommended file structure, which is also referred to as
TMEX Format.)
SHA-1 COMPUTATION ALGORITHM
This description of the SHA computation is adapted from the Secure Hash Standard SHA-1 document as
it can be downloaded from the NIST web site (http://www.itl.nist.gov/fipspubs/fip180-1.htm). The
algorithm takes as its input data sixteen 32-bit words Mt (0
≤
t
≤
15), as shown in Tables 1, 2 and 4 for
the Compute Next Secret, Copy Scratchpad and Read Authenticated Page command, respectively. The
SHA computation involves a sequence of eighty 32-bit words called Wt (0
≤
t
≤
79), a sequence of eighty
32-bit words called Kt (0
≤
t
≤
79), a Boolean function ft (B, C, D) (0
≤
t
≤
79) with B, C and D being
32-bit words, and three more 32-bit words called A, E and TMP. The operations required for the SHA
computation are arithmetic addition without carry (“+”), logical inversion or 1’s complement (“\”),
EXCLUSIVE OR (“
⊕
”), logical AND (“
∧
”), logical OR (“
∨
”), assignment (“:=”), and circular shifting
within a 32-bit word. The expression “Sn(X)” represents a circular shift of X by n positions to the left,
with X being a 32-bit word.
The function ft is defined as follows:
ft(B,C,D) = (B
∧
C)
∨
((B\)
∧
D)
B
⊕
C
⊕
D
(B
∧
C)
∨
(B
∧
D)
∨
(C
∧
D)
B
⊕
C
⊕
D
(0
≤
t
≤
19)
(20
≤
t
≤
39)
(40
≤
t
≤
59)
(60
≤
t
≤
79)
The sequence Wt (0
≤
t
≤
79) is defined as follows:
Wt := Mt
S1(Wt-3
⊕
Wt-8
⊕
Wt-14
⊕
Wt-16)
(0
≤
t
≤
15)
(16
≤
t
≤
79)
The sequence Kt (0
≤
t
≤
79) is defined as follows:
Kt
:=
5A827999h
6ED9EBA1h (20
≤
t
≤
39)
8F1BBCDCh (40
≤
t
≤
59)
CA62C1D6h (60
≤
t
≤
79)
(0
≤
t
≤
19)
相關(guān)PDF資料
PDF描述
DS2432P 1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine
DS2432X 1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine
DS2432 1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine(1K 位具有寫(xiě)保護(hù)的1線EEPROM（帶SHA-1引擎）)
DS2433 4k-Bit 1-Wire EEPROM
DS2433-Z01 4K-Bit 1-Wire EEPROM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2432_12 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:1Kb Protected 1-Wire EEPROM with SHA-1 Engine
DS2432P 功能描述:電可擦除可編程只讀存儲(chǔ)器 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8
DS2432P R 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:1Kb Protected 1-Wire EEPROM with SHA-1 Engine
DS2432P T 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:1Kb Protected 1-Wire EEPROM with SHA-1 Engine
DS2432P/T&R 功能描述:電可擦除可編程只讀存儲(chǔ)器 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8
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