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參數(shù)資料
| 型號(hào)： | DS2415X |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Timer or RTC |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, X6 |
| 封裝： | CHIP SCALE |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 343K |
| 代理商： | DS2415X |
DS2415
14 of 14
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C, VPUP = 2.5V to 6.0V, VBAT = 2.5V to 5.5V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Time Slot
tSLOT
60
120
s
Write 1 Low Time
tLOW1
115
s
Write 0 Low Time
tLOW0
60
120
s
Read Low Time
tLOWR
115
s
Read Data Valid
tRDV
exactly 15
s
Release Time
tRELEASE
015
45
s
Read Data Setup
tSU
1
s
6
Recovery Time
tREC
1
s
Reset Time High
tRSTH
480
s
5
Reset Time Low
tRSTL
480
960
s
8
Presence Detect High
tPDH
15
60
s
Presence Detect Low
tPDL
60
240
s
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. VPUP = external pullup voltage.
4. Input load is to ground.
5. An additional reset or communication sequence cannot begin until the reset high time has expired.
6. Read data setup time refers to the time the bus master must pull the I/O line low to read a bit. Data is
guaranteed to be valid within 1
s of this falling edge.
7. Under certain low voltage conditions VIL1MAX may have to be reduced to as much as 0.5V to always
guarantee a Presence Pulse.
8. The reset low time (tRSTL) should be restricted to a maximum of 960
s, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
9. When VBAT ramps up, the oscillator is always off.
10. At VBAT = 3V
±10%
11. At VBAT = 5V
±10%
12. VIH1 has to be VBAT -0.3V or higher.
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相關(guān)代理商/技術(shù)參數(shù) |
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| DS2416FP00K | 制造商:Thomas & Betts 功能描述:200A,CON,3P4W,MG,416,3P208V,CC |
| DS2416FR000 | 制造商:Thomas & Betts 功能描述:200A,REC,3P4W,MG,416,3P208V,SC |
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| DS2416MP000 | 制造商:Thomas & Betts 功能描述:DS2416MP000 200A,PLG,3P4W,MG,416 制造商:Thomas & Betts 功能描述:200A,PLG,3P4W,MG,416,3P208V |
| DS2416MP00K | 制造商:Thomas & Betts 功能描述:200A,PLG,3P4W,MG,416,3P208V,CC |
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