參數(shù)資料
型號: DS2404
廠商: DALLAS SEMICONDUCTOR
元件分類: Timer or RTC
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP16
封裝: 0.300 INCH, DIP-16
文件頁數(shù): 16/29頁
文件大?。?/td> 760K
代理商: DS2404
DS2404
23 of 29
Battery Operate Mode
Figure 17 shows the necessary connections for operating the DS2404 in Battery Operate mode.
BATTERY OPERATE MODE Figure 17
VCC
Pin 1 & 16
Ground
VBATB
Pin 9
Ground
VBATO
Pin 10
2.8 to 5.5V
The VBATO pin is normally connected to any standard 3 V lithium cell or other energy source. The Battery
Operate mode also minimizes the power-consumption in applications where battery backup is not
required and the VBATO lead is directly connected to the system’s 5V supply.
Note: In Battery Operate mode, the voltage on DQ must never exceed the voltage on VBATO if the 3-wire
interface is used. This restriction does not apply to the 1-Wire interface.
DEVICE OPERATION MODES
With its two ports and two power modes the DS2404 can be operated in several ways. While the
maximum voltage on the 1-Wire port (I/O) is always 6V, the maximum voltage on the 3-wire port (DQ)
depends on the power mode and actual operating voltage. A particular port is selected by setting the
control lines to a state that makes the other port inactive. See Table 1 for details.
When using the 3-wire port only and the DS2404 is wired for VCC Operate Mode (Battery Backed) the
1 Wire I/O pin can be used as counter input. This mode requires that the I/O lead is connected to VCC
through a 5k
(typical) resistor. To enable communication through the 3-wire port a reset/presence
sequence has to be performed on the 1-Wire port after the system has powered up.
OPERATION MODES AND CONDITIONS (Table 1)
PORT USAGE
BATTERY OPERATE MODE
VCC OPERATE MODE (BATTERY BACKED)
1-Wire only
Float RST , DQ, CLK or tie to GND
DQ Voltage (3-wire)
≤ VBATO
DQ Voltage (3-wire)
≤ VCC +0.3V
3-Wire only
If unused: float I/O (1-Wire) or tie to GND; if used as counter input: see text
DQ Voltage (3-wire)
≤ VBATO
DQ Voltage (3-wire)
≤ VCC +0.3V
1-Wire and 3-wire
Dual Port Operation
1-Wire Port: finish each communication with a reset/presence sequence: when
idle: either keep I/O pulled high through a resistor or pull it low;
3-wire Port: when idle: keep RST and CLK low, keep DQ high or low or
floating
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