參數(shù)資料
型號(hào): DS21Q50L
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 72/87頁(yè)
文件大?。?/td> 0K
描述: IC TRANSCEIVER E1 QUAD 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 90
功能: 收發(fā)器
接口: E1
電路數(shù): 4
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 230mA
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤(pán)
包括: AIS 警報(bào)檢測(cè)器和發(fā)生器,回送功能,PRBS 發(fā)生器 / 檢測(cè)器,遠(yuǎn)程檢測(cè)器和發(fā)生器
DS21Q50
74 of 87
20.
OPERATING PARAMETERS
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground………………………………………………………………-1.0V to +6.0V
Operating Temperature Range for DS21Q50L………………………………………………………………..0°C to +70°C
Operating Temperature Range for DS21Q50LN……………………………………………………………-40°C to +85°C
Storage Temperature Range………………………………………………………………………………...-55°C to +125°C
Soldering Temperature………………………………………………………..See IPC/JEDEC J-STD-020A Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA = 0°C to +70°C for DS21Q50L; -40°C to +85°C for DS21Q50LN.)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Logic 1
VIH
2.0
5.5
V
Logic 0
VIL
-0.3
+0.8
V
Supply (Note 1)
VDD
3.135
3.3
3.465
V
CAPACITANCE
(TA = +25°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Input Capacitance
CIN
5
pF
Output Capacitance
COUT
7
pF
DC CHARACTERISTICS
(VDD = 3.3V
±5%, TA = 0°C to +70°C for DS21Q50L; VDD = 3.3V ±5%, TA = -40°C to +85°C for DS21Q50LN.)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Supply Current at 3.3V (Note 2)
IDD
230
mA
Input Leakage (Note 3)
IIL
-1.0
+1.0
mA
Output Leakage (Note 4)
ILO
+1.0
mA
Output Current (2.4V)
IOH
-1.0
mA
Output Current (0.4V)
IOL
+4.0
mA
Note 1:
Applies to RVDD, TVDD, and DVDD.
Note 2:
TCLKs = SYSCLKs = MCLK = 2.048MHz; outputs open circuited; TTIPs and TRINGs driving 30
W; QRSS data pattern. 0.0V < VIN <
VDD.
Note 3:
Applied to
INT when tri-stated.
Note 4:
Applies to output pins in tri-state condition.
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