參數(shù)資料
型號(hào): DS21Q48N
英文描述: 5V E1/T1/J1 Line Interface
中文描述: 5V的E1/T1/J1線路接口
文件頁(yè)數(shù): 38/75頁(yè)
文件大?。?/td> 544K
代理商: DS21Q48N
DS2148/Q48
38 of 75
RIR1 (08H): RECEIVE INFORMATION REGISTER 1
(MSB)
ZD
16ZD
HBD
SYMBOL
POSITION
(LSB)
N/A
RCLC
RUA1C
JALT
N/A
DESCRIPTION
Zero Detect.
Set when a string of at least four (ETS = 0) or
eight (ETS = 1) consecutive zeros (regardless of the length of
the string) have been received. Will be cleared when read.
Sixteen Zero Detect.
Set when at least 16 consecutive zeros
(regardless of the length of the string) have been received. Will
be cleared when read.
HDB3/B8ZS Word Detect.
Set when an HDB3 (ETS = 0) or
B8ZS (ETS = 1) code word is detected independent of whether
the receive HDB3/B8ZS mode (CCR4.6) is enabled. Will be
cleared when read. Useful for automatically setting the line
coding.
Receive Carrier Loss Clear.
Set when the RCL alarm has met
the clear criteria defined in Table 7-1. Will be cleared when
read.
Receive Unframed All Ones Clear.
Set when the unframed all
ones signal is no longer detected. Will be cleared when read.
See Table 7-1.
Jitter Attenuator Limit Trip.
Set when the jitter attenuator
FIFO reaches to within 4 bits of its useful limit. Will be cleared
when read. Useful for debugging jitter attenuation operation.
Not Assigned.
Could be any value when read.
Not Assigned.
Could be any value when read.
ZD
(latched)
RIR1.7
16ZD
(latched)
RIR1.6
HBD
(latched)
RIR1.5
RCLC
(latched)
RIR1.4
RUA1C
(latched)
RIR1.3
JALT
(latched)
RIR1.2
N/A
RIR1.1
N/A
RIR1.0
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