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參數(shù)資料
| 型號： | DS21Q44T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 52/105頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRAMER ENHANCED E1 4X 128TQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 控制器類型： | E1 調(diào)幀器 |
| 接口： | 并行/串行 |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 管件 |
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DS21Q44
50 of 105
TCBR1/TCBR2/TCBR3/TCBR4: DEFINITION WHEN CCR3.6=1
(MSB)
(LSB)
CH20
CH4
CH19
CH3
CH18
CH2
CH17*
CH1*
TCBR1 (22)
CH24
CH8
CH23
CH7
CH22
CH6
CH21
CH5
TCBR2 (23)
CH28
CH12
CH27
CH11
CH26
CH10
CH25
CH9
TCBR3 (24)
CH32
CH16
CH31
CH15
CH30
CH14
CH29
CH13
TCBR4 (25)
NOTE:
*=CH1 and CH17 should be set to one to allow the internal TS1 register to create the CAS Multiframe
Alignment Word and Spare/Remote Alarm bits.
The user can also take advantage of this functionality to intermix signaling data from the TSIG pin and
from the internal Transmit Signaling Registers (TS1 to TS16). As an example, assume that the user
wishes to source all the signaling data except for voice channels 5 and 10 from the TSIG pin. In this
application, the following bits and registers would be programmed as follows:
CONTROL BITS
REGISTER VALUES
THSE=1 (CCR3.2)
TS1=0Bh (MF alignment word, remote alarm etc.)
TCBFS=1 (CCR3.6)
TCBR1=03h (source timeslot 16, frame 1 data)
T16S=1(TCR1.5)
TCBR2=01h (source voice Channel 5 signaling data from TS6)
TCBR3=04h (source voice Channel 10 signaling data from TS11)
TCBR4=00h
11. PER-CHANNEL CODE GENERATION AND LOOPBACK
Each framer in the DS21Q44 can replace data on a channel–by–channel basis in both the transmit and
receive directions. The transmit direction is from the backplane to the E1 line and is covered in Section
11.1. The receive direction is from the E1 line to the backplane and is covered in Section 11.2.
11.1 Transmit Side Code Generation
In the transmit direction there are two methods by which channel data from the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 11.1.1 was a
feature contained in the original DS21Q43 while the second method which is covered in Section 11.1.2 is
a new feature of the DS21Q44.
11.1.1 Simple Idle Code Insertion and Per-Channel Loopback
The first method involves using the Transmit Idle Registers (TIR1/2/3/4) to determine which of the 32 E1
channels should be overwritten with the code placed in the Transmit Idle Definition Register (TIDR).
This method allows the same 8–bit code to be placed into any of the 32 E1 channels. If this method is
used, then the CCR3.5 control bit must be set to zero.
Each of the bit position in the Transmit Idle Registers (TIR1/TIR2/TIR3/TIR4) represent a DS0 channel
in the outgoing frame. When these bits are set to a one, the corresponding channel will transmit the Idle
Code contained in the Transmit Idle Definition Register (TIDR).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| DS21Q44T+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q44TN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48A3N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48B | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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