參數(shù)資料
型號: DS21FT42
廠商: Maxim Integrated Products
文件頁數(shù): 64/114頁
文件大小: 0K
描述: IC FRAMER T1 4X3 12CH 300-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 40
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 225mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 300-BBGA
供應(yīng)商設(shè)備封裝: 300-PBGA(27x27)
包裝: 管件
DS21FT42/DS21FF42
53 of 114
SYMBOL
POSITION
NAME AND DESCRIPTION
B6
TDS0M.2
Transmit DS0 Channel Bit 6.
B7
TDS0M.1
Transmit DS0 Channel Bit 7.
B8
TDS0M.0
Transmit DS0 Channel Bit 8. LSB of the DS0 channel (last
bit to be transmitted).
CCR6: COMMON CONTROL REGISTER 6 (Address=1E Hex)
[repeated here from section 10 for convenience]
(MSB)
(LSB)
RJC
RESALGN
TESALGN
RCM4
RCM3
RCM2
RCM1
RCM0
SYMBOL
POSITION
NAME AND DESCRIPTION
RJC
CCR6.7
Receive Japanese CRC6 Enable.
0 = use ANSI/AT&T/ITU CRC6 calculation (normal
operation)
1 = use Japanese standard JT–G704 CRC6 calculation
RESALGN
CCR6.6
Receive Elastic Store Align. Setting this bit from a zero to a
one will force the receive elastic store’s write/read pointers to
a minim separation of half a frame. If pointer separation is
already greater than half a frame, setting this bit will have no
effect. Should be toggled after RSYSCLK has been applied
and is stable. Must be cleared and set again for a subsequent
align. See Section 17 for details.
TESALGN
CCR6.5
Transmit Elastic Store Align. Setting this bit from a zero to
a one will force the transmit elastic store’s write/read pointers
to a minimum separation of half a frame. If pointer
separation is already greater than half a frame, setting this bit
will have no effect. Should be toggled after TSYSCLK has
been applied and is stable. Must be cleared and set again for
a subsequent align. See Section 17 for details.
RCM4
CCR6.4
Receive Channel Monitor Bit 4. MSB of a channel decode
that determines which receive channel data will appear in the
RDS0M register. See Section 13 for details.
RCM3
CCR6.3
Receive Channel Monitor Bit 3.
RCM2
CCR6.2
Receive Channel Monitor Bit 2.
RCM1
CCR6.1
Receive Channel Monitor Bit 1.
RCM0
CCR6.0
Receive Channel Monitor Bit 0. LSB of the channel
decode.
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