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參數(shù)資料
| 型號(hào)： | DS21FF42 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA300 |
| 封裝： | 27 X 27 MM, BGA-300 |
| 文件頁(yè)數(shù)： | 68/115頁(yè) |
| 文件大?。?/td> | 534K |
| 代理商： | DS21FF42 |
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DS21FF42/DS21FT42
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SYMBOL
POSITION
NAME AND DESCRIPTION
D(24)
RS12.7
Signaling Bit D in Channel 24
A(1)
RS1.0
Signaling Bit A in Channel 1
Each Receive Signaling Register (RS1 to RS12) reports the incoming robbed bit signaling from eight
DS0 channels. In the ESF framing mode, there can be up to four signaling bits per channel (A, B, C, and
D). In the D4 framing mode, there are only two signaling bits per channel (A and B). In the D4 framing
mode, the framer will replace the C and D signaling bit positions with the A and B signaling bits from the
previous multiframe. Hence, whether the framer is operated in either framing mode, the user needs only
to retrieve the signaling bits every 3 ms. The bits in the Receive Signaling Registers are updated on
multiframe boundaries so the user can utilize the Receive Multiframe Interrupt in the Receive Status
Register 2 (SR2.7) to know when to retrieve the signaling bits. The Receive Signaling Registers are
frozen and not updated during a loss of sync condition (SR1.0=1). They will contain the most recent
signaling information before the “OOF” occurred. The signaling data reported in RS1 to RS12 is also
available at the RSIG and RSER pins.
A change in the signaling bits from one multiframe to the next will cause the RSC status bit (SR2.0) to be
set. The user can enable the INT* pin to toggle low upon detection of a change in signaling by setting the
IMR2.0 bit. Once a signaling change has been detected, the user has at least 2.75 ms to read the data out
of the RS1 to RS12 registers before the data will be lost.
TS1 TO TS12: TRANSMIT SIGNALING REGISTERS (Address=70 to 7B Hex)
(MSB)
(LSB)
A(8)
A(7)
A(6)
A(5)
A(4)
A(3)
A(2)
A(1)
TS1 (70)
A(16)
A(15)
A(14)
A(13)
A(12)
A(11)
A(10)
A(9)
TS2 (71)
A(24)
A(23)
A(22)
A(21)
A(20)
A(19)
A(18)
A(17)
TS3 (72)
B(8)
B(7)
B(6)
B(5)
B(4)
B(3)
B(2)
B(1)
TS4 (73)
B(16)
B(15)
B(14)
B(13)
B(12)
B(11)
B(10)
B(9)
TS5 (74)
B(24)
B(23)
B(22)
B(21)
B(20)
B(19)
B(18)
B(17)
TS7 (75)
A/C(8)
A/C(7)
A/C(6)
A/C(5)
A/C(4)
A/C(3)
A/C(2)
A/C(1)
TS7 (76)
A/C(16)
A/C(15)
A/C(14)
A/C(13)
A/C(12)
A/C(11)
A/C(10)
A/C(9)
TS8 (77)
A/C(24)
A/C(23)
A/C(22)
A/C(21)
A/C(20)
A/C(19)
A/C(18)
A/C(17)
TS9 (78)
B/D(8)
B/D(7)
B/D(6)
B/D(5)
B/D(4)
B/D(3)
B/D(2)
B/D(1)
TS10 (79)
B/D(16)
B/D(15)
B/D(14)
B/D(13)
B/D(12)
B/D(11)
B/D(10)
B/D(9)
TS11 (7A)
B/D(24)
B/D(23)
B/D(22)
B/D(21)
B/D(20)
B/D(19)
B/D(18)
B/D(17)
TS12 (7B)
SYMBOL
POSITION
NAME AND DESCRIPTION
D(24)
TS12.7
Signaling Bit D in Channel 24
A(1)
TS1.0
Signaling Bit A in Channel 1
Each Transmit Signaling Register (TS1 to TS12) contains the Robbed Bit signaling for eight DS0
channels that will be inserted into the outgoing stream if enabled to do so via TCR1.4. In the ESF
framing mode, there can be up to four signaling bits per channel (A, B, C, and D). On multiframe
boundaries, the framer will load the values present in the Transmit Signaling Register into an outgoing
signaling shift register that is internal to the device.
The user can utilize the Transmit Multiframe
Interrupt in Status Register 2 (SR2.6) to know when to update the signaling bits. In the ESF framing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS21FF42N | DATACOM, FRAMER, PBGA300 |
| DS21FT44N | DATACOM, FRAMER, PBGA300 |
| DS21FT44 | DATACOM, FRAMER, PBGA300 |
| DS21Q352 | DATACOM, PCM TRANSCEIVER, PBGA256 |
| DS21Q354 | DATACOM, PCM TRANSCEIVER, PBGA256 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21FF42+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl T1/T1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF42N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF42N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl T1/T1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF44 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF44N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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