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參數(shù)資料
| 型號： | DS2188SN/TRL |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/10頁 |
| 文件大小： | 0K |
| 描述： | IC ATTEN JTR T1/CEPT IND 16-SOIC |
| 標準包裝： | 45 |
| 類型： | 漂移衰減器 |
| 應(yīng)用： | T1/CEPT |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
DS2188
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greater than 120 UIpp, the BL pin will transition high. When the incoming jitter returns to less than
120 UIpp, the BL pin will return low.
The jitter attenuator in the DS2188 can be disabled by tying the DJA pin high. When the jitter attenuator
is disabled, the FIFO is bypassed and jitter received at RCLK, RPOS and RNEG is passed through the
DS2188 to RRCLK, RRPOS, and RRNEG. In this situation, the BL pin has no significance and XTAL
OUT will not be coherent with RRCLK.
How to use the DS2188 with Dallas Semiconductor’s other T1 and CEPT line interface parts is illustrated
in Figures 3 through 5. Figure 3 illustrates how to use the DS2188 in the receive path along with a
DS2187 Receive Line Interface. Figure 4 illustrates how to use the DS2188 in the transmit path with the
DS2186 Transmit Line Interface.
BUFFER DEPTH SELECT
The buffer size on the DS2188 can be configured to either 128 or 32 bits via the BDS pin. If BDS is tied
low, then the buffer depth will be 128 bits and hence can handle input jitter up to 120 UIpp without losing
its full attenuation capabilities as is described above in the Over-view. If BDS is tied high, then the
buffer depth is shortened to 32 bits. In this configuration, the DS2188 can handle input jitter up to
28 UIpp without losing its full jitter attenuation capabilities. The user may wish to limit the buffer size to
32 bits in applications where through-put delay is critical or into existing applications that al-ready have
32 bits of buffer space.
RESET
The buffer on the DS2188 is automatically centered on power-up. The user can recenter the 128-bit (or
32-bit) buffer on demand via the RST pin. The RST pin on the DS2188 is negative-edge triggered. When
this pin transitions from high-to-low, the buffer is recentered. The RST pin can be held either high or low
during operation of the DS2188; only a negative going signal will initiate a recentering. In most cases, a
reset of the DS2188 will corrupt data that is currently passing through the buffer.
DS2188 TI JITTER ATTENUATION PERFORMANCE Figure 1
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