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參數(shù)資料
| 型號(hào)： | DS2187 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | Digital Transmission Interface |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PDIP18 |
| 封裝： | 0.300 INCH, DIP-18 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大小： | 330K |
| 代理商： | DS2187 |
MAX9010–MAX9013
SC70, 5ns, Low-Power, Single-Supply,
Precision TTL Comparators
_______________________________________________________________________________________
5
Note 4: Although Common-Mode Input Voltage Range is restricted to -0.2V
≤ VCM ≤ (VCC - 1.9V), either or both inputs can go to either
absolute maximum voltage limit, i.e., from -0.3V to (VCC + 0.3V), without damage. The comparator will make a correct (and fast)
logic decision provided that at least one of the two inputs is within the specified common-mode range. If both inputs are outside
the common-mode range, the comparator output state is indeterminate.
Note 5: For the MAX9012, Input Offset Voltage is defined as the input voltage(s) required to make the OUT output voltage(s) remain
stable at 1.4V. For the MAX9013, it is defined as the average of two input offset voltages, measured by forcing first the OUT
output, then the OUT output to 1.4V.
Note 6: Propagation delay for these high-speed comparators is guaranteed by design because it cannot be accurately measured
with low levels of input overdrive voltage using automatic test equipment in production. Note that for low overdrive
conditions, VOS is added to the overdrive.
Note 7: Differential Propagation Delay, measured either on a single output of the MAX9012/MAX9013 (or between OUT and OUT
outputs on the MAX9013) is defined as:
tPD(±) = |(tPD+) - (tPD-)|.
Note 8: Latch times are guaranteed by design. Latch setup time (tSU) is the interval in which the input signal must be stable prior to
asserting the latch signal. The hold time (tH) is the interval after the latch is asserted in which the input signal must remain
stable. Latch propagation delay (tLPD) is the delay time for the output to respond when the latch enable pin is deasserted
(see Figure 1).
t = 5ns/div
RESPONSE TO -5mV OVERDRIVE
IN: 50mV/div
OUT: 1V/div
0
IN
3V
+100mV
MAX9010–13 toc02
OUT
0
6.0
3.5
1
10
100
4.0
MAX9010
–
13
toc03
OVERDRIVE (mV)
PROPAGATION
DELAY
(ns)
4.5
5.0
5.5
PROPAGATION DELAY
vs. INPUT OVERDRIVE
3.0
tPD(+)
tPD(-)
t = 5ns/div
RESPONSE TO +5mV OVERDRIVE
IN: 50mV/div
OUT: 1V/div
0
IN
3V
-100mV
MAX9010–13 toc01
OUT
0
Typical Operating Characteristics
(VCC = 5V, CL = 15pF, TA = +25°C, unless otherwise noted.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2187+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Receive Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2187S | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Receive Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2187S/T&R | 制造商:Maxim Integrated Products 功能描述:IC RECEIVE LINE INTERFACE 20SOIC |
| DS2187S/T&R | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Receive Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2187S+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Receive Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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